Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
48-LQFP |
Number of Pins |
48 |
Operating Temperature |
-40°C~105°C TJ |
Packaging |
Tray |
Published |
2000 |
Series |
ispMACH® 4000B |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
48 |
ECCN Code |
EAR99 |
Terminal Finish |
Matte Tin (Sn) |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
LC4064 |
Pin Count |
48 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
2.5V |
Programmable Type |
In System Programmable |
Max Supply Voltage |
2.7V |
Min Supply Voltage |
2.3V |
Operating Supply Current |
12mA |
Number of I/O |
32 |
Nominal Supply Current |
12mA |
Memory Type |
EEPROM |
Propagation Delay |
10 ns |
Max Frequency |
400MHz |
Number of Programmable I/O |
208 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
Number of Dedicated Inputs |
4 |
Voltage Supply - Internal |
2.3V~2.7V |
Delay Time tpd(1) Max |
10ns |
Number of Logic Elements/Blocks |
4 |
Height Seated (Max) |
1.2mm |
Length |
7mm |
Width |
7mm |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
LC4064B-10TN48I Overview
This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).It is embedded in the 48-LQFP package.The device has 32inputs and outputs.Terminations of devices are set to [0].QUADis the terminal position of this electrical part.The power source is powered by 2.5Vvolts.This part is in the family [0].It is recommended to package the chip by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Chips should be mounted by Surface Mount.The FPGA belongs to the ispMACH? 4000B series.Chips are programmed with 48 pins.This device can also display [0].According to the LC4064, its related parts can be found.In order to achieve high efficiency, the supply voltage should be maintained at [0].In general, it is recommended to store data in [0].In this case, it is mounted by Surface Mount.There are 48 pins on the device.There is a maximum supply voltage of 2.7V.It is powered by 2.3Vas its minimum supply voltage.4logic elements/blocks exist.In total, there are 208programmable I/Os.Ideally, the maximal frequency should be lower than 400MHz Hz.Input signals are detected by 4dedicated inputs.
LC4064B-10TN48I Features
48-LQFP package
32 I/Os
The operating temperature of -40°C~105°C TJ
48 pin count
48 pins
LC4064B-10TN48I Applications
There are a lot of Lattice Semiconductor Corporation LC4064B-10TN48I CPLDs applications.
- INTERRUPT SYSTEM
- Software-Driven Hardware Configuration
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- PLC analog input modules
- ON-CHIP OSCILLATOR CIRCUIT
- TIMERS/COUNTERS
- DDC INTERFACE
- LED Lighting systems
- Bootloaders for FPGAs
- Wide Vin Industrial low power SMPS