LC4064V-25TN48C
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 48-LQFP |
| Number of Pins | 48 |
| Operating Temperature | 0°C~90°C TJ |
| Packaging | Tray |
| Published | 2000 |
| Series | ispMACH® 4000V |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 48 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Frequency | 454.5MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | LC4064 |
| Pin Count | 48 |
| Operating Supply Voltage | 3.3V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Operating Supply Current | 12mA |
| Number of I/O | 32 |
| Nominal Supply Current | 12mA |
| Memory Type | EEPROM |
| Propagation Delay | 2.5 ns |
| Turn On Delay Time | 2.5 ns |
| Number of Logic Elements/Cells | 160 |
| Number of Programmable I/O | 272 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| Number of Dedicated Inputs | 4 |
| Voltage Supply - Internal | 3V~3.6V |
| Number of Logic Elements/Blocks | 4 |
| Height Seated (Max) | 1.2mm |
| Length | 7mm |
| Width | 7mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
LC4064V-25TN48C Overview
A mobile phone network consists of 64macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The product is contained in a 48-LQFP package.As a result, it has 32 I/O ports programmed.There are 48 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.Its terminal position is QUAD.The device is powered by a voltage of 3.3V volts.It is a part of the family [0].It is recommended to package the chip by Tray.To ensure reliability, the device operates at a temperature of [0].Ideally, the chip should be mounted by Surface Mount.As part of the ispMACH? 4000Vseries, it is a type of FPGA.The chip is programmed with 48 pins.It is also possible to find YESwhen using this device.The LC4064indicates that related parts can be found.It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency.For data storage, EEPROMis adopted.The electronic component is mounted by Surface Mount.The pins are [0].With a maximum supply voltage of [0], it operates.The minimal supply voltage is 3V.This logic block consists of 4logic elements.There are 272 programmable I/Os in this system.There is 454.5MHz frequency that can be achieved.Input signals are detected using 4dedicated inputs.An elementary building block consists of 160logic elements/cells.
LC4064V-25TN48C Features
48-LQFP package
32 I/Os
The operating temperature of 0°C~90°C TJ
48 pin count
48 pins
LC4064V-25TN48C Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-25TN48C CPLDs applications.
- Pattern recognition
- Code converters
- Digital multiplexers
- Auxiliary Power Supply Isolated and Non-isolated
- State machine control
- State machine design
- PULSE WIDTH MODULATION (PWM)
- PLC analog input modules
- Synchronous or asynchronous mode
- Timing control
