LC4064V-5T100I
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 100-LQFP |
| Number of Pins | 100 |
| Operating Temperature | -40°C~105°C TJ |
| Packaging | Tray |
| Published | 2000 |
| Series | ispMACH® 4000V |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Frequency | 227.27MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | LC4064 |
| Pin Count | 100 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Operating Supply Current | 12mA |
| Number of I/O | 64 |
| Nominal Supply Current | 12mA |
| Memory Type | EEPROM |
| Propagation Delay | 5 ns |
| Turn On Delay Time | 5 ns |
| Number of Logic Elements/Cells | 36 |
| Number of Programmable I/O | 272 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| Number of Dedicated Inputs | 10 |
| Voltage Supply - Internal | 3V~3.6V |
| Number of Logic Elements/Blocks | 4 |
| Height Seated (Max) | 1.6mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Lead Free |
LC4064V-5T100I Overview
The mobile phone network has 64 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).You can find it in package [0].As you can see, this device has 64 I/O ports programmed into it.Terminations of devices are set to [0].This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.The power supply voltage is 3.3V.It is a part of the family [0].It is recommended to package the chip by Tray.Due to its reliability, it is operated at a temperature of [0].It is recommended that the chip be mounted by Surface Mount.It belongs to the ispMACH? 4000Vseries of FPGAs.There are 100 pins on the chip.If this device is used, you will also be able to find [0].In accordance with the [0], its related parts are listed.In order to achieve high efficiency, the supply voltage should be maintained at [0].Data is stored using [0].Surface Mountis the mounting point of this electronic part.It is designed with 100 pins.A voltage of 3.6V is the maximum supply voltage for this device.It operates with the minimal supply voltage of 3V.There are 4 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.In total, there are 272programmable I/Os.There can be 227.27MHz frequency achieved.A total of 10dedicated inputs are available for detecting the status of input signals.As a fundamental building block, there are 36 logic elements/cells.
LC4064V-5T100I Features
100-LQFP package
64 I/Os
The operating temperature of -40°C~105°C TJ
100 pin count
100 pins
LC4064V-5T100I Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-5T100I CPLDs applications.
- Field programmable gate
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Discrete logic functions
- INTERRUPT SYSTEM
- POWER-SAVING MODES
- Boolean function generators
- ROM patching
- Dedicated input registers
- USB Bus
- PULSE WIDTH MODULATION (PWM)
