Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
100-LQFP |
Number of Pins |
100 |
Operating Temperature |
-40°C~105°C TJ |
Packaging |
Tray |
Published |
2000 |
Series |
ispMACH® 4000V |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
Terminal Finish |
Matte Tin (Sn) |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Frequency |
227.27MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
LC4064 |
Pin Count |
100 |
Operating Supply Voltage |
3.3V |
Programmable Type |
In System Programmable |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Operating Supply Current |
12mA |
Number of I/O |
64 |
Nominal Supply Current |
12mA |
Memory Type |
EEPROM |
Propagation Delay |
5 ns |
Turn On Delay Time |
5 ns |
Number of Programmable I/O |
304 |
Number of Logic Blocks (LABs) |
36 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
Number of Dedicated Inputs |
10 |
Voltage Supply - Internal |
3V~3.6V |
Number of Logic Elements/Blocks |
4 |
Height Seated (Max) |
1.6mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
LC4064V-5TN100I Overview
64 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.In the 100-LQFPpackage, you will find it.In this case, there are 64 I/Os programmed.It is programmed to terminate devices at [0].QUADis the terminal position of this electrical part.The device is powered by a voltage of 3.3V volts.The part belongs to Programmable Logic Devices family.Trayis the packaging method.To ensure reliability, the device operates at a temperature of [0].Chips should be mounted by Surface Mount.The ispMACH? 4000Vseries comprises this type of FPGA.There are 100pins on the chip.It is also possible to find YESwhen using this device.Its related parts can be found in the [0].It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency.It is adopted to store data in [0].This electronic part is mounted in the way of Surface Mount.There are 100 pins embedded in the device.A maximum voltage of 3.6Vis required for operation.Initially, it requires a voltage of 3Vas the minimum supply voltage.There are 4 logic elements/blocks.There are a total of 304 Programmable I/Os.In this case, 227.27MHzis the frequency that can be achieved.Its basic building block is composed of 36 logic blocks (LABs).The status of input signals is detected by 10dedicated inputs.
LC4064V-5TN100I Features
100-LQFP package
64 I/Os
The operating temperature of -40°C~105°C TJ
100 pin count
100 pins
36 logic blocks (LABs)
LC4064V-5TN100I Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-5TN100I CPLDs applications.
- ON-CHIP OSCILLATOR CIRCUIT
- Field programmable gate
- Page register
- Protection relays
- Preset swapping
- Complex programmable logic devices
- Random logic replacement
- Wide Vin Industrial low power SMPS
- Digital multiplexers
- Voltage level translation