LC4064V-75T48E
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 48-LQFP |
| Number of Pins | 48 |
| Operating Temperature | -40°C~130°C TJ |
| Packaging | Tray |
| Published | 2000 |
| Series | ispMACH® 4000V |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 48 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn85Pb15) |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Frequency | 178.57MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | LC4064 |
| Pin Count | 48 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Operating Supply Current | 12mA |
| Number of I/O | 32 |
| Nominal Supply Current | 12mA |
| Memory Type | EEPROM |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 7.5 ns |
| Number of Logic Elements/Cells | 4 |
| Number of Programmable I/O | 388 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| Number of Dedicated Inputs | 4 |
| Voltage Supply - Internal | 3V~3.6V |
| Height Seated (Max) | 1.2mm |
| Length | 7mm |
| Width | 7mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Lead Free |
LC4064V-75T48E Overview
There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.48-LQFPis the package in which it resides.It is programmed with 32 I/Os.Devices are programmed with terminations of [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.There is 3.3V voltage supply for this device.It is a part of family [0].Package the chip by Tray.To ensure reliability, the device operates at a temperature of [0].It is recommended to mount the chip by Surface Mount.The FPGA belongs to the ispMACH? 4000V series.A chip with 48pins is programmed.If this device is used, you will also be able to find [0].The LC4064contains its related parts.Optimal efficiency requires a supply voltage of [0].EEPROM is adopted for storing data.The electronic part is mounted by Surface Mount.It is designed with 48 pins.There is a maximum supply voltage of 3.6V.In order for it to operate, a supply voltage of 3Vis required.A total of 388Programmable I/Os are present.You can achieve 178.57MHzfrequencies.To detect the status of input signals, there are 4dedicated inputs.Basic building blocks have 4logic elements.
LC4064V-75T48E Features
48-LQFP package
32 I/Os
The operating temperature of -40°C~130°C TJ
48 pin count
48 pins
LC4064V-75T48E Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-75T48E CPLDs applications.
- Pattern recognition
- Digital systems
- State machine design
- Configurable Addressing of I/O Boards
- Digital designs
- ON-CHIP OSCILLATOR CIRCUIT
- STANDARD SERIAL INTERFACE UART
- Reset swapping
- LED Lighting systems
- I/O PORTS (MCU MODULE)
