Parameters |
Terminal Finish |
Matte Tin (Sn) |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Frequency |
178.57MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
LC4064 |
Pin Count |
100 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
1.8V |
Programmable Type |
In System Programmable |
Max Supply Voltage |
1.9V |
Min Supply Voltage |
1.7V |
Operating Supply Current |
80μA |
Number of I/O |
64 |
Memory Type |
EEPROM |
Propagation Delay |
3.7 ns |
Turn On Delay Time |
7.5 ns |
Number of Logic Elements/Cells |
36 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
Number of Dedicated Inputs |
10 |
Voltage Supply - Internal |
1.7V~1.9V |
Number of Logic Elements/Blocks |
4 |
Height Seated (Max) |
1.6mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
100-LQFP |
Number of Pins |
100 |
Weight |
657.000198mg |
Operating Temperature |
-40°C~105°C TJ |
Packaging |
Tray |
Published |
2000 |
Series |
ispMACH® 4000Z |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
LC4064ZC-75TN100I Overview
This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).You can find it in package [0].There are 64 I/Os on the board.The termination of a device is set to [0].There is a QUADterminal position on the electrical part in question.Power is supplied by a voltage of 1.8V volts.It is a part of the family [0].Package the chip by Tray.Ensure its reliability by operating at [0].Mount the chip by Surface Mount.In this case, it is a type of FPGA belonging to the ispMACH? 4000Z series.There are 100pins on the chip.If you use this device, you will also find [0].The LC4064indicates that related parts can be found.In order to maintain high efficiency, the supply voltage should be maintained at [0].EEPROM is adopted for storing data.Surface Mountis used to mount this electronic component.A total of 100pins are provided on this board.A maximum voltage of 1.9Vis required for operation.Initially, it requires a voltage of 1.7Vas the minimum supply voltage.4logic blocks/elements are present.There is a maximum frequency of 178.57MHz.The status of input signals is determined by 10dedicated inputs.As a fundamental building block, there are 36 logic elements/cells.
LC4064ZC-75TN100I Features
100-LQFP package
64 I/Os
The operating temperature of -40°C~105°C TJ
100 pin count
100 pins
LC4064ZC-75TN100I Applications
There are a lot of Lattice Semiconductor Corporation LC4064ZC-75TN100I CPLDs applications.
- Field programmable gate
- Multiple Clock Source Selection
- ON-CHIP OSCILLATOR CIRCUIT
- Auxiliary Power Supply Isolated and Non-isolated
- D/T registers and latches
- I2C BUS INTERFACE
- Software Configuration of Add-In Boards
- Digital designs
- Page register
- Wireless Infrastructure Base Band Unit and Remote Radio Unit