Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
100-LQFP |
Number of Pins |
100 |
Operating Temperature |
-40°C~105°C TJ |
Packaging |
Tray |
Published |
2000 |
Series |
ispMACH® 4000V |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Frequency |
178.57MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
LC4128 |
Pin Count |
100 |
Operating Supply Voltage |
3.3V |
Programmable Type |
In System Programmable |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Operating Supply Current |
12mA |
Number of I/O |
64 |
Nominal Supply Current |
12mA |
Memory Type |
EEPROM |
Propagation Delay |
7.5 ns |
Turn On Delay Time |
7.5 ns |
Number of Logic Blocks (LABs) |
36 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
Number of Dedicated Inputs |
10 |
Voltage Supply - Internal |
3V~3.6V |
Number of Logic Elements/Blocks |
8 |
Height Seated (Max) |
1.6mm |
Length |
14mm |
Width |
14mm |
Radiation Hardening |
No |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Lead Free |
LC4128V-75T100I Overview
A mobile phone network consists of 128macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).There is a 100-LQFP package containing it.The device is programmed with 64 I/O ports.There is a 100terminations set on devices.Its terminal position is QUAD.Power is supplied by a voltage of 3.3V volts.It is a part of family [0].Package the chip by Tray.Due to its reliability, it is operated at a temperature of [0].Ensure that the chip is mounted by Surface Mount.The FPGA belongs to the ispMACH? 4000V series.A chip with 100pins is programmed.It is also possible to find YESwhen using this device.In accordance with the [0], its related parts are listed.In order to maintain high efficiency, the supply voltage should be maintained at [0].Data is stored using [0].It is mounted by Surface Mount.This board has 100 pins.There is a maximum supply voltage of 3.6V.The device is designed to operate with a minimal supply voltage of 3VV.There are a total of 8 logic elements or blocks.This frequency can be achieved at 178.57MHz.It consists of 36 logic blocks (LABs).The status of input signals is determined by 10dedicated inputs.
LC4128V-75T100I Features
100-LQFP package
64 I/Os
The operating temperature of -40°C~105°C TJ
100 pin count
100 pins
36 logic blocks (LABs)
LC4128V-75T100I Applications
There are a lot of Lattice Semiconductor Corporation LC4128V-75T100I CPLDs applications.
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Parity generators
- D/T registers and latches
- Bootloaders for FPGAs
- Digital designs
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Preset swapping
- ON-CHIP OSCILLATOR CIRCUIT
- POWER-SAVING MODES