LC51024MV-75FN672C
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 672-BBGA |
| Number of Pins | 672 |
| Operating Temperature | 0°C~90°C TJ |
| Packaging | Tray |
| Published | 2000 |
| Series | ispXPLD® 5000MV |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 672 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 250 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | LC51024 |
| Pin Count | 672 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Memory Size | 88kB |
| Operating Supply Current | 75mA |
| Number of I/O | 381 |
| Nominal Supply Current | 75mA |
| Memory Type | EEPROM, SRAM |
| Propagation Delay | 9.5 ns |
| Number of Logic Elements/Cells | 32 |
| Max Frequency | 250MHz |
| Number of Programmable I/O | 48 |
| Output Function | MACROCELL |
| Number of Macro Cells | 1024 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 7.5ns |
| Height Seated (Max) | 2.6mm |
| Length | 27mm |
| Width | 27mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
LC51024MV-75FN672C Overview
The mobile phone network has 1024 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).There is a 672-BBGA package containing it.It is equipped with 381I/O ports.It is programmed to terminate devices at [0].This electrical part has a terminal position of BOTTOMand is connected to the ground.The device is powered by a voltage of 3.3V volts.It belongs to the family [0].It is packaged in the way of Tray.To ensure reliability, the device operates at a temperature of [0].There should be a Surface Mounton the chip.In this case, it is a type of FPGA belonging to the ispXPLD? 5000MV series.With 672pins programmed, the chip is ready to use.This device is also capable of displaying [0].The LC51024contains its related parts.In order to maintain high efficiency, the supply voltage should be maintained at [0].It is recommended to store data in [0].The electronic part is mounted by Surface Mount.672pins are included in its design.A maximum supply voltage of 3.6Vis used in its operation.A minimum supply voltage of 3V is required for this device to operate.There are a total of 48 Programmable I/Os.The maximum frequency should not exceed 250MHz.Fundamental building blocks consist of 32logic elements/cells.The devices contain a memory of 88kBthat can be used to store programs and data.
LC51024MV-75FN672C Features
672-BBGA package
381 I/Os
The operating temperature of 0°C~90°C TJ
672 pin count
672 pins
LC51024MV-75FN672C Applications
There are a lot of Lattice Semiconductor Corporation LC51024MV-75FN672C CPLDs applications.
- Pattern recognition
- State machine design
- ROM patching
- Power Meter SMPS
- DDC INTERFACE
- Complex programmable logic devices
- State machine control
- PULSE WIDTH MODULATION (PWM)
- DMA control
- ON-CHIP OSCILLATOR CIRCUIT
