LC5512MV-75FN484I
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 484-BBGA |
| Number of Pins | 484 |
| Operating Temperature | -40°C~105°C TJ |
| Packaging | Tray |
| Published | 2000 |
| Series | ispXPLD® 5000MV |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 484 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 250 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | LC5512 |
| Pin Count | 484 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Operating Supply Current | 33mA |
| Number of I/O | 253 |
| Nominal Supply Current | 33mA |
| Memory Type | EEPROM, SRAM |
| Propagation Delay | 9.5 ns |
| Number of Logic Elements/Cells | 16 |
| Max Frequency | 275MHz |
| Number of Programmable I/O | 256 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 7.5ns |
| Height Seated (Max) | 2.6mm |
| Length | 23mm |
| Width | 23mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
LC5512MV-75FN484I Overview
There are 512 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is contained in package [0].In this case, there are 253 I/Os programmed.Terminations of devices are set to [0].This electrical component has a terminal position of 0.There is 3.3V voltage supply for this device.This part is included in Programmable Logic Devices.Ideally, the chip should be packaged by Tray.The device operates at a temperature of -40°C~105°C TJin order to ensure its reliability.Surface Mountshould be used for mounting the chip.In this case, it is a type of FPGA belonging to the ispXPLD? 5000MV series.484pins are programmed on the chip.The device can also be used to find [0].The LC5512contains its related parts.It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency.For data storage, EEPROM, SRAMis adopted.It is mounted by Surface Mount.There are 484pins on it.In this case, the maximum supply voltage is 3.6V.It is powered by 3Vas its minimum supply voltage.Currently, there are 256 Programmable I/Os available.It should be below 275MHzat the maximal frequency.A fundamental building block consists of 16logic elements/cells.
LC5512MV-75FN484I Features
484-BBGA package
253 I/Os
The operating temperature of -40°C~105°C TJ
484 pin count
484 pins
LC5512MV-75FN484I Applications
There are a lot of Lattice Semiconductor Corporation LC5512MV-75FN484I CPLDs applications.
- Multiple Clock Source Selection
- ROM patching
- STANDARD SERIAL INTERFACE UART
- Voltage level translation
- Page register
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- White goods (Washing, Cold, Aircon ,...)
- Complex programmable logic devices
- Bootloaders for FPGAs
- DMA control
