Parameters | |
---|---|
Factory Lead Time | 1 Week |
Package / Case | 525-FBGA, FCBGA |
Surface Mount | YES |
Operating Temperature | -40°C~105°C |
Packaging | Tray |
Published | 2013 |
Series | QorIQ® Layerscape |
Part Status | Active |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Number of Terminations | 525 |
ECCN Code | 3A991.A.1 |
HTS Code | 8542.31.00.01 |
Technology | CMOS |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Peak Reflow Temperature (Cel) | 260 |
Supply Voltage | 1V |
Terminal Pitch | 0.8mm |
Time@Peak Reflow Temperature-Max (s) | 40 |
JESD-30 Code | S-PBGA-B525 |
Supply Voltage-Max (Vsup) | 1.03V |
Supply Voltage-Min (Vsup) | 0.97V |
Speed | 1.0GHz |
uPs/uCs/Peripheral ICs Type | MICROPROCESSOR CIRCUIT |
Core Processor | ARM® Cortex®-A7 |
Ethernet | GbE (3) |
Number of Cores/Bus Width | 2 Core 32-Bit |
RAM Controllers | DDR3L, DDR4 |
USB | USB 3.0 (1) + PHY |
Security Features | Secure Boot, TrustZone® |
Display & Interface Controllers | 2D-ACE |
SATA | SATA 6Gbps (1) |
Height Seated (Max) | 2.07mm |
Length | 19mm |
RoHS Status | ROHS3 Compliant |
The LS1021AXN7KQB communications processor is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. A member of the value-performance tier, the LS1021AXN7KQB processor provides extensive integration and power efficiency for fanless, small form factor enterprise networking applications. Incorporating dual Arm? Cortex?-A7 cores running up to 1.2 GHz, the LS1021AXN7KQB processor is engineered to deliver CoreMark? performance of over 7,000, as well as virtualization support, advanced security features, and the broadest array of high-speed interconnects and optimized peripheral features ever offered in a sub-3 W processor.
Dual Arm v7 Cortex?-A7 32-bit cores, each supporting dual precision floating point and NEON SIMD module running up to 1.2 GHz
32 KB instruction and data L1 cache with single bit error detection and correction, ECC protection on both instruction and data caches
Up to 512 KB coherent L2 cache with single bit error detection and correction, ECC protection
Arm Cache Coherent Interconnect (CCI400)
Arm AMBA 4 MPCore Virtualization
Integrated Flash controller supporting 16-bit interface
QuadSPI Flash controller
Enterprise AP routers for 802.11ac/n
Multi-protocol IoT gateways
Industrial and factory automation
Mobile wireless routers
Printing
Building automation
Smart energy