M2S005-1VF256
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | IN PRODUCTION (Last Updated: 3 weeks ago) |
| Package / Case | 256-LFBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~85°C TJ |
| Packaging | Tray |
| Published | 2015 |
| Series | SmartFusion®2 |
| JESD-609 Code | e0 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | LG-MIN, WD-MIN |
| HTS Code | 8542.39.00.01 |
| Subcategory | Field Programmable Gate Arrays |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.8mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | S-PBGA-B256 |
| Number of Outputs | 161 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 1.26V |
| Power Supplies | 1.2V |
| Supply Voltage-Min (Vsup) | 1.14V |
| Number of I/O | 161 |
| Speed | 166MHz |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DDR |
| Connectivity | CANbus, Ethernet, I2C, SPI, UART/USART, USB |
| Architecture | MCU, FPGA |
| Number of Inputs | 161 |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Primary Attributes | FPGA - 5K Logic Modules |
| Number of Logic Cells | 6060 |
| Flash Size | 128KB |
| Height Seated (Max) | 1.56mm |
| Length | 14mm |
| Width | 14mm |
| RoHS Status | Non-RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
A core processor ARM? Cortex?-M3 is used to build this SoC.Package 256-LFBGA is assigned to this system on a chip by the manufacturer.This SoC chip is equipped with 64KB RAM and guarantees reliable performance to the user.Using the MCU, FPGA technique, this SoC design's internal architecture is simple.SmartFusion?2 is the series name of this system on chip SoC.The average operating temps for this SoC meaning should be 0°C~85°C TJ.A significant feature of this SoC security is the combination of FPGA - 5K Logic Modules.This SoC system on a chip has been designed in a state-of-the-art Tray package.This SoC part has a total of 161 I/Os.A 1.2V power supply should be used.There are voltages higher than 1.26V that should be avoided when using the SoCs wireless.There is a possibility that it can be powered by a power supply of at least 1.14V.The configuration of FIELD PROGRAMMABLE GATE ARRAY can be adapted to meet the needs of different design projects.It is really beneficial to have system on a chip since there are 256 terminations in total.In the same way that other high-quality Field Programmable Gate Arrays will do, it is also capable of providing outstanding performance.A SoC chip like this can have 161 outputs.A power supply of 1.2V is required to run system on chip.The SoC chip is equipped with 161 inputs.6060 logic cells are present in logic system on chips.As for its flash size, it is 128KB.Moreover, this SoC processor is also equipped with additional features of LG-MIN, WD-MIN.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
128KB extended flash.
LG-MIN, WD-MIN
There are a lot of Microsemi Corporation
M2S005-1VF256 System On Chip (SoC) applications.
- Industrial sectors
- Industrial automation devices
- RISC-V
- Published Paper
- Mobile computing
- DC-input BLDC motor drive
- Cyber security for critical applications in the aerospace
- Industrial transport
- Industrial AC-DC
- Industrial
