M2S010-VF256
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | IN PRODUCTION (Last Updated: 2 weeks ago) |
| Package / Case | 256-LFBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~85°C TJ |
| Packaging | Tray |
| Published | 2015 |
| Series | SmartFusion®2 |
| JESD-609 Code | e0 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | LG-MIN, WD-MIN |
| HTS Code | 8542.39.00.01 |
| Subcategory | Field Programmable Gate Arrays |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.8mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | S-PBGA-B256 |
| Number of Outputs | 138 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 1.26V |
| Power Supplies | 1.2V |
| Supply Voltage-Min (Vsup) | 1.14V |
| Number of I/O | 138 |
| Speed | 166MHz |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DDR, PCIe, SERDES |
| Connectivity | CANbus, Ethernet, I2C, SPI, UART/USART, USB |
| Architecture | MCU, FPGA |
| Number of Inputs | 138 |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Primary Attributes | FPGA - 10K Logic Modules |
| Number of Logic Cells | 12084 |
| Flash Size | 256KB |
| Height Seated (Max) | 1.56mm |
| Length | 14mm |
| Width | 14mm |
| RoHS Status | Non-RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
A ARM? Cortex?-M3 core processor(s) is built into this SoC.Its package is 256-LFBGA.Users will enjoy reliable performance with this SoC chip, which has implemented 64KB RAM.The SoC design uses MCU, FPGA architecture for its internal architecture.The SmartFusion?2 series contains this system on chip SoC.For this SoC meaning, the average operating temperature should be 0°C~85°C TJ.A significant feature of this SoC security is the combination of FPGA - 10K Logic Modules.Tray package houses this SoC system on a chip.An integral part of this SoC consists of a total of 138 I/Os.For safe operation, it is advisable to utilize a power supply with 1.2V voltage.In the SoCs wireless, voltages above 1.26V are considered unsafe.As a minimum, the power supply of the SoC system on a chip needs to be 1.14V.Different designing requirements can be met with FIELD PROGRAMMABLE GATE ARRAY.In total, there are 256 terminations, which is great for system on a chip.Furthermore, it has a remarkable system on a chip capability, much like other high-quality Field Programmable Gate Arrays.In order for this SoC chip to work properly, you can have 138 outputs.System on chip requires 1.2V power supplies.Inputs are available on the SoC chip in the number of 138.Logic system on chips consist of 12084 logic cells.It has a 256KB flash.Aside from that, this SoC processor is also equipped with some additional features that are present in LG-MIN, WD-MIN.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
256KB extended flash.
LG-MIN, WD-MIN
There are a lot of Microsemi Corporation
M2S010-VF256 System On Chip (SoC) applications.
- Networked Media Encode/Decode
- Video Imaging
- Microcontroller
- Industrial sectors
- Fitness
- Published Paper
- Measurement testers
- CNC control
- Keyboard
- Microprocessors
