M2S050TS-1FCS325I
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | IN PRODUCTION (Last Updated: 2 weeks ago) |
| Package / Case | 325-TFBGA, CSPBGA |
| Surface Mount | YES |
| Operating Temperature | -40°C~100°C TJ |
| Packaging | Tray |
| Series | SmartFusion®2 |
| JESD-609 Code | e0 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 325 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | LG-MIN, WD-MIN |
| HTS Code | 8542.39.00.01 |
| Subcategory | Field Programmable Gate Arrays |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | S-PBGA-B325 |
| Number of Outputs | 200 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 1.26V |
| Power Supplies | 1.2V |
| Supply Voltage-Min (Vsup) | 1.14V |
| Number of I/O | 200 |
| Speed | 166MHz |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DDR, PCIe, SERDES |
| Connectivity | CANbus, Ethernet, I2C, SPI, UART/USART, USB |
| Architecture | MCU, FPGA |
| Number of Inputs | 200 |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Primary Attributes | FPGA - 50K Logic Modules |
| Number of Logic Cells | 56340 |
| Flash Size | 256KB |
| Height Seated (Max) | 1.01mm |
| Length | 11mm |
| Width | 11mm |
| RoHS Status | Non-RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
A core processor ARM? Cortex?-M3 is used to build this SoC.Manufacturer assigns package 325-TFBGA, CSPBGA to this system on a chip.Users will enjoy reliable performance with this SoC chip, which has implemented 64KB RAM.The SoC design uses MCU, FPGA architecture for its internal architecture.In the SmartFusion?2 series, this system on chip SoC is included.The average operating temps for this SoC meaning should be -40°C~100°C TJ.This SoC security combines FPGA - 50K Logic Modules and that is something to note.This SoC system on a chip has been designed in a state-of-the-art Tray package.This SoC part has a total of 200 I/Os.A power supply with a 1.2V rating is recommended.In the SoCs wireless, voltages above 1.26V are considered unsafe.Power supplies of at least 1.14V are required.FIELD PROGRAMMABLE GATE ARRAY can be re-configured to serve different design needs.Having 325 terminations in total makes system on a chip possible.There is no doubt that this system on a chip is outstanding, just as other high-quality Field Programmable Gate Arrays will do.In order for this SoC chip to work properly, you can have 200 outputs.There is 1.2V power supply requirement for this system on chip SoC.There are 200 inputs available on the SoC chip.Logic system on chips consist of 56340 logic cells.A 256KB flash can be seen on it.Further features of this SoC processor are LG-MIN, WD-MIN.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
256KB extended flash.
LG-MIN, WD-MIN
There are a lot of Microsemi Corporation
M2S050TS-1FCS325I System On Chip (SoC) applications.
- Medical
- Central alarm system
- Efficient hardware for inference of neural networks
- Three phase UPS
- Level
- ARM Cortex M4 microcontroller
- Smartphones
- Fitness
- Microcontroller based SoC ( RISC-V, ARM)
- Video Imaging
