M74HC112B1R
| Parameters | |
|---|---|
| Mount | Through Hole |
| Mounting Type | Through Hole |
| Package / Case | 16-DIP (0.300, 7.62mm) |
| Number of Pins | 16 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e3 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | Matte Tin (Sn) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 4.5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | M74HC112 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 79MHz |
| Propagation Delay | 125 ns |
| Turn On Delay Time | 14 ns |
| Family | HC/UH |
| Logic Function | AND, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max I(ol) | 0.004 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 21ns @ 6V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 5pF |
| Clock Edge Trigger Type | Negative Edge |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
M74HC112B1R Overview
In the form of 16-DIP (0.300, 7.62mm), it has been packaged. It is contained within the Tubepackage. Currently, the output is configured to use Differential. It is configured with the trigger Negative Edge. There is an electric part mounted in the way of Through Hole. A voltage of 2V~6Vis required for its operation. In this case, the operating temperature is -55°C~125°C TA. It belongs to the type JK Typeof flip flops. This type of FPGA is a part of the 74HC series. There should be no greater frequency than 79MHzon its output. It consumes 2μA of quiescent There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. D latch belongs to the M74HC112 family. The D flip flop is powered by a voltage of 4.5V . There is 5pF input capacitance for this T flip flop. HC/UHis the family of this D flip flop. A part of the electronic system is mounted in the way of Through Hole. This board is designed with 16pins on it. The clock edge trigger type for this device is Negative Edge. There is a base part number FF/Latchesfor the RS flip flops. Vsup reaches its maximum value at 6V. It is imperative that the supply voltage (Vsup) is maintained above 2Vin order to ensure normal operation. Due to its superior flexibility, it uses 2 circuits.
M74HC112B1R Features
Tube package
74HC series
16 pins
M74HC112B1R Applications
There are a lot of STMicroelectronics M74HC112B1R Flip Flops applications.
- Individual Asynchronous Resets
- Computers
- Asynchronous counter
- Data transfer
- Registers
- Automotive
- Functionally equivalent to the MC10/100EL29
- Memory
- Storage Registers
- High Performance Logic for test systems
