MC100E131FN
| Parameters | |
|---|---|
| Package / Case | 28-LCC (J-Lead) |
| Number of Pins | 28 |
| Operating Temperature | 0°C~85°C TA |
| Packaging | Tube |
| Published | 1996 |
| Series | 100E |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 28 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn80Pb20) |
| Subcategory | FF/Latches |
| Technology | ECL |
| Voltage - Supply | -4.2V~-5.7V |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 5V |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 100E131 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.7V |
| Number of Circuits | 4 |
| Number of Bits | 4 |
| Clock Frequency | 1.4GHz |
| Propagation Delay | 675 ps |
| Turn On Delay Time | 500 ps |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 70mA |
| Output Characteristics | OPEN-EMITTER |
| Trigger Type | Positive Edge |
| High Level Output Current | 50mA |
| Low Level Output Current | 50mA |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
MC100E131FN Overview
The item is packaged in 28-LCC (J-Lead)cases. D flip flop is included in the Tubepackage. It is configured with Differentialas an output. The trigger it is configured with uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. The supply voltage is set to -4.2V~-5.7V. In this case, the operating temperature is 0°C~85°C TA. The type of this D latch is D-Type. The 100Eseries comprises this type of FPGA. In order for it to function properly, its output frequency should not exceed 1.4GHz. In total, it contains 1 elements. During its operation, it consumes 70mA quiescent energy. The number of terminations is 28. JK flip flop belongs to 100E131 family. Power is provided by a 5V supply. Surface Mount mounts this electronic component. Basically, it is designed with a set of 28 pins. This device's clock edge trigger type is Positive Edge. The RS flip flops belongs to FF/Latches base part number. It is designed with 4bits. It reaches 5.7Vwhen the maximum supply voltage (Vsup) is applied. Using 4 circuits, it is highly flexible. A high level output current of 50mAis set. There is no low level output current set at 50mA.
MC100E131FN Features
Tube package
100E series
28 pins
4 Bits
MC100E131FN Applications
There are a lot of ON Semiconductor MC100E131FN Flip Flops applications.
- Circuit Design
- Frequency Divider circuits
- Data Synchronizers
- QML qualified product
- Data transfer
- Test & Measurement
- Latch-up performance
- Instrumentation
- Data storage
- Common Clocks
