Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
28-LCC (J-Lead) |
Number of Pins |
28 |
Operating Temperature |
0°C~85°C TA |
Packaging |
Tube |
Published |
2006 |
Series |
100E |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
28 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn80Pb20) |
Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V |
Subcategory |
FF/Latches |
Technology |
ECL |
Voltage - Supply |
-4.2V~-5.7V |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
5V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
100E431 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.7V |
Power Supplies |
-4.5V |
Supply Voltage-Min (Vsup) |
4.2V |
Clock Frequency |
1.1GHz |
Propagation Delay |
850 ps |
Turn On Delay Time |
700 ps |
Logic Function |
AND, Flip-Flop |
Current - Quiescent (Iq) |
132mA |
Output Characteristics |
OPEN-EMITTER |
Number of Bits per Element |
1 |
Trigger Type |
Positive, Negative |
Number of Input Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
4.57mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC100E431FN Overview
It is embeded in 28-LCC (J-Lead) case. The package Tubecontains it. Currently, the output is configured to use Differential. Positive, Negativeis the trigger it is configured with. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates at -4.2V~-5.7Vvolts. Temperature is set to 0°C~85°C TA. The type of this D latch is D-Type. In terms of FPGAs, it belongs to the 100E series. Its output frequency should not exceed 1.1GHz Hz. As a result, it consumes 132mA quiescent current. A total of 28terminations have been recorded. The 100E431 family contains it. The power source is powered by 5V. There is an electronic part that is mounted in the way of Surface Mount. A total of 28pins are provided on this board. In this device, the clock edge trigger type is Positive Edge. The part is included in FF/Latches. It reaches 5.7Vwhen the maximum supply voltage (Vsup) is applied. It is imperative that the supply voltage (Vsup) is maintained above 4.2Vin order to ensure normal operation. A total of -4.5V power supplies are needed to run it. Currently, there are 3 input lines present. Additionally, there are NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V on the electronic flip flop that can be referred to.
MC100E431FN Features
Tube package
100E series
28 pins
-4.5V power supplies
MC100E431FN Applications
There are a lot of ON Semiconductor MC100E431FN Flip Flops applications.
- High Performance Logic for test systems
- Clock pulse
- Event Detectors
- Frequency Dividers
- Computers
- Balanced Propagation Delays
- Buffer registers
- Modulo – n – counter
- EMI reduction circuitry
- Control circuits