MC100EL30DWR2G
| Parameters | |
|---|---|
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Set(Preset) and Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Differential |
| Number of Elements | 3 |
| Supply Voltage-Max (Vsup) | 5.7V |
| Supply Voltage-Min (Vsup) | 4.2V |
| Clock Frequency | 1.2GHz |
| Current - Quiescent (Iq) | 62mA |
| Output Characteristics | OPEN-EMITTER |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Trigger Type | Positive Edge |
| Propagation Delay (tpd) | 0.82 ns |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 100EL |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V |
| Technology | ECL |
| Voltage - Supply | -4.2V~-5.7V |
| Terminal Position | DUAL |
MC100EL30DWR2G Overview
The item is packaged in 20-SOIC (0.295, 7.50mm Width)cases. The package Tape & Reel (TR)contains it. This output is configured with Differential. It is configured with a trigger that uses a value of Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at -4.2V~-5.7Vvolts. A temperature of -40°C~85°C TAis used in the operation. This D latch has the type D-Type. The FPGA belongs to the 100EL series. It should not exceed 1.2GHzin terms of its output frequency. A total of 3elements are contained within it. As a result, it consumes 62mA of quiescent current without being affected by external factors. There are 20 terminations,The power supply voltage is 5V. It reaches 5.7Vwhen the maximum supply voltage (Vsup) is applied. For normal operation, the supply voltage (Vsup) should be kept above 4.2V. It is also characterized by NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V.
MC100EL30DWR2G Features
Tape & Reel (TR) package
100EL series
MC100EL30DWR2G Applications
There are a lot of Rochester Electronics, LLC MC100EL30DWR2G Flip Flops applications.
- Frequency division
- Modulo – n – counter
- Registers
- Dynamic threshold performance
- High Performance Logic for test systems
- ESCC
- Storage Registers
- Data Synchronizers
- Event Detectors
- Count Modes
