Parameters |
Radiation Hardening |
No |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Lead Free |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2007 |
Series |
100EP |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
ECL |
Voltage - Supply |
-3V~-5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
100EP29 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
-4.5V |
Supply Voltage-Min (Vsup) |
3V |
Number of Bits |
1 |
Clock Frequency |
3GHz |
Propagation Delay |
500 ps |
Turn On Delay Time |
420 ps |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
57mA |
Trigger Type |
Positive, Negative |
High Level Output Current |
-50mA |
Low Level Output Current |
50mA |
Number of Input Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
Length |
6.5mm |
Width |
4.4mm |
MC100EP29DT Overview
The package is in the form of 20-TSSOP (0.173, 4.40mm Width). It is contained within the Tubepackage. This output is configured with Differential. The trigger it is configured with uses Positive, Negative. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of -3V~-5.5V volts. A temperature of -40°C~85°C TAis used in the operation. This electronic flip flop is of type D-Type. JK flip flop is a part of the 100EPseries of FPGAs. A frequency of 3GHzshould not be exceeded by its output. A total of 2elements are contained within it. As a result, it consumes 57mA quiescent current. Currently, there are 20 terminations. If you search by 100EP29, you will find similar parts. A voltage of 3.3V provides power to the D latch. Electronic part Surface Mountis mounted in the way. A total of 20pins are provided on this board. In this device, the clock edge trigger type is Positive Edge. The part is included in FF/Latches. There are 1bits in this flip flop. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. For normal operation, the supply voltage (Vsup) should be above 3V. Considering its reliability, this T flip flop is well suited for RAIL. The D latch runs on a voltage of -4.5V volts. This input has 1lines in it. Additionally, you may refer to the additional NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V of the electronic flip flop. A -50mAvalue is set for the high level output current. In the low level output current setting, 50mAis used.
MC100EP29DT Features
Tube package
100EP series
20 pins
1 Bits
-4.5V power supplies
MC100EP29DT Applications
There are a lot of ON Semiconductor MC100EP29DT Flip Flops applications.
- Clock pulse
- Balanced 24 mA output drivers
- Memory
- Latch-up performance
- ESD protection
- ATE
- ESD performance
- Single Up Count-Control Line
- Automotive
- Computers