MC100EP52DTR2
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2006 |
| Series | 100EP |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 100EP52 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | -4.5V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 3GHz |
| Propagation Delay | 380 ps |
| Turn On Delay Time | 330 ps |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 45mA |
| Trigger Type | Positive, Negative |
| High Level Output Current | -50mA |
| Low Level Output Current | 50mA |
| Power Supply Current-Max (ICC) | 47mA |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 4000000000Hz |
| Length | 3mm |
| Width | 3mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
MC100EP52DTR2 Overview
The item is packaged in 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)cases. Package Tape & Reel (TR)embeds it. There is a Differentialoutput configured with it. It is configured with a trigger that uses Positive, Negative. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at -3V~-5.5Vvolts. -40°C~85°C TAis the operating temperature. D-Typedescribes this flip flop. The FPGA belongs to the 100EP series. You should not exceed 3GHzin its output frequency. T flip flop consumes 45mA quiescent energy. 8terminations have occurred. D latch belongs to the 100EP52 family. Power is provided by a 3.3V supply. It is mounted by the way of Surface Mount. With its 8pins, it is designed to work with most electronic flip flops. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. It is designed with 1bits. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. For normal operation, the supply voltage (Vsup) should be kept above 3V. To achieve this superior flexibility, 1 circuits are used. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TAPE AND REEL. The system runs on a power supply of -4.5V watts. It is also characterized by NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V. There is -50mA output current at the high level. 50mAis set as the low level output current.
MC100EP52DTR2 Features
Tape & Reel (TR) package
100EP series
8 pins
1 Bits
-4.5V power supplies
MC100EP52DTR2 Applications
There are a lot of ON Semiconductor MC100EP52DTR2 Flip Flops applications.
- Individual Asynchronous Resets
- Digital electronics systems
- Event Detectors
- Pattern generators
- Cold spare funcion
- Count Modes
- ATE
- Latch
- Shift Registers
- Data storage
