MC10E131FNR2
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 28-LCC (J-Lead) |
| Number of Pins | 28 |
| Operating Temperature | 0°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2006 |
| Series | 10E |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 28 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -4.2V~-5.7V |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 5V |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 10E131 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.7V |
| Power Supplies | -5.2V |
| Number of Circuits | 4 |
| Number of Bits | 4 |
| Clock Frequency | 1.4GHz |
| Propagation Delay | 675 ps |
| Turn On Delay Time | 500 ps |
| Family | 10E |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 70mA |
| Output Characteristics | OPEN-EMITTER |
| Trigger Type | Positive Edge |
| High Level Output Current | 50mA |
| Low Level Output Current | 50mA |
| Power Supply Current-Max (ICC) | 70mA |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
MC10E131FNR2 Overview
It is embeded in 28-LCC (J-Lead) case. There is an embedded version in the package Tape & Reel (TR). T flip flop uses Differentialas its output configuration. In the configuration of the trigger, Positive Edgeis used. In this case, the electronic component is mounted in the way of Surface Mount. Powered by a -4.2V~-5.7Vvolt supply, it operates as follows. In the operating environment, the temperature is 0°C~85°C TA. This electronic flip flop is of type D-Type. In FPGA terms, D flip flop is a type of 10Eseries FPGA. You should not exceed 1.4GHzin its output frequency. The list contains 1 elements. As a result, it consumes 70mA of quiescent current without being affected by external factors. There are 28 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 10E131 family contains it. A voltage of 5V is used as the power supply for this D latch. Devices in the 10Efamily are electronic devices. There is an electronic component mounted in the way of Surface Mount. There are 28pins on it. A Positive Edgeclock edge trigger is used in this device. This device has the base part number FF/Latches. 4bits are used in its design. As soon as Vsup reaches 5.7V, the maximum supply voltage is reached. Due to its superior flexibility, it uses 4 circuits. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. A power supply of -5.2Vis required to operate it. A high level output current of 50mAis set. 50mAis set as the low level output current.
MC10E131FNR2 Features
Tape & Reel (TR) package
10E series
28 pins
4 Bits
-5.2V power supplies
MC10E131FNR2 Applications
There are a lot of ON Semiconductor MC10E131FNR2 Flip Flops applications.
- Clock pulse
- Latch
- Dynamic threshold performance
- Communications
- Control circuits
- Data storage
- Reduced system switching noise
- Divide a clock signal by 2 or 4
- Storage Registers
- Balanced 24 mA output drivers
