MC10EL35DR2
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 10EL |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -4.2V~-5.7V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 5V |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 10EL35 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.7V |
| Power Supplies | -5.2V |
| Supply Voltage-Min (Vsup) | 4.2V |
| Number of Circuits | 1 |
| Number of Bits | 2 |
| Clock Frequency | 2.2GHz |
| Propagation Delay | 700 ps |
| Turn On Delay Time | 525 ps |
| Logic Function | Flip-Flop |
| Current - Quiescent (Iq) | 32mA |
| Output Characteristics | OPEN-EMITTER |
| Prop. Delay@Nom-Sup | 0.745 ns |
| Trigger Type | Positive Edge |
| Power Supply Current-Max (ICC) | 32mA |
| Clock Edge Trigger Type | Positive Edge |
| Length | 4.9mm |
| Width | 3.9mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
MC10EL35DR2 Overview
The package is in the form of 8-SOIC (0.154, 3.90mm Width). Package Tape & Reel (TR)embeds it. It is configured with Differentialas an output. It is configured with a trigger that uses Positive Edge. It is mounted in the way of Surface Mount. A voltage of -4.2V~-5.7Vis required for its operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. A flip flop of this type is classified as a D-Type. In terms of FPGAs, it belongs to the 10EL series. You should not exceed 2.2GHzin the output frequency of the device. As a result, it consumes 32mA quiescent current and is not affected by external forces. In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. If you search by 10EL35, you will find similar parts. Power is provided by a 5V supply. This electronic part is mounted in the way of Surface Mount. Basically, it is designed with a set of 8 pins. A Positive Edgeclock edge trigger is used in this device. The part is included in FF/Latches. It is designed with a number of bits of 2. Vsup reaches its maximum value at 5.7V. Normally, the supply voltage (Vsup) should be kept above 4.2V. 1 circuits are used to achieve its superior flexibility. In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. The D latch runs on a voltage of -5.2V volts. Additionally, you may refer to the D latch's additional NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V.
MC10EL35DR2 Features
Tape & Reel (TR) package
10EL series
8 pins
2 Bits
-5.2V power supplies
MC10EL35DR2 Applications
There are a lot of ON Semiconductor MC10EL35DR2 Flip Flops applications.
- Circuit Design
- ESD protection
- Storage Registers
- Instrumentation
- Shift Registers
- ESCC
- Patented noise
- Consumer
- Computers
- Latch-up performance
