MC10EL35DTG
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2006 |
| Series | 10EL |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | ECL |
| Voltage - Supply | -4.2V~-5.7V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 10EL35 |
| Function | Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.7V |
| Power Supplies | -5.2V |
| Supply Voltage-Min (Vsup) | 4.2V |
| Number of Circuits | 1 |
| Number of Bits | 2 |
| Clock Frequency | 2.2GHz |
| Propagation Delay | 700 ps |
| Turn On Delay Time | 525 ps |
| Logic Function | Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 32mA |
| Halogen Free | Halogen Free |
| Prop. Delay@Nom-Sup | 0.745 ns |
| Trigger Type | Positive Edge |
| Power Supply Current-Max (ICC) | 32mA |
| Clock Edge Trigger Type | Positive Edge |
| Height | 950μm |
| Length | 3.1mm |
| Width | 3.1mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
MC10EL35DTG Overview
8-TSSOP, 8-MSOP (0.118, 3.00mm Width)is the packaging method. A package named Tubeincludes it. T flip flop is configured with an output of Differential. This trigger is configured to use Positive Edge. There is an electronic component mounted in the way of Surface Mount. A voltage of -4.2V~-5.7Vis used as the supply voltage. Currently, the operating temperature is -40°C~85°C TA. This logic flip flop is classified as type D-Type. In this case, it is a type of FPGA belonging to the 10EL series. It should not exceed 2.2GHzin terms of its output frequency. This process consumes 32mA quiescents. Terminations are 8. JK flip flop belongs to 10EL35 family. Power is supplied from a voltage of 5V volts. In this case, the electronic component is mounted in the way of Surface Mount. The 8pins are designed into the board. Its clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. 2bits are used in its design. It reaches 5.7Vwhen the maximum supply voltage (Vsup) is applied. For normal operation, the supply voltage (Vsup) should be above 4.2V. The superior flexibility of this circuit is achieved by using 1 circuits. Due to its reliability, this T flip flop is well suited for RAIL. A power supply of -5.2Vis required to operate it. Additionally, you may refer to the D latch's additional NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V.
MC10EL35DTG Features
Tube package
10EL series
8 pins
2 Bits
-5.2V power supplies
MC10EL35DTG Applications
There are a lot of ON Semiconductor MC10EL35DTG Flip Flops applications.
- Reduced system switching noise
- Matched Rise and Fall
- ESD protection
- Registers
- Set-reset capability
- Control circuits
- Buffered Clock
- QML qualified product
- Bounce elimination switch
- High Performance Logic for test systems
