MC10EP29MNG
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFQFN Exposed Pad |
| Number of Pins | 20 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2006 |
| Series | 10EP |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | QUAD |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 10EP29 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 2 |
| Clock Frequency | 3GHz |
| Propagation Delay | 500 ps |
| Turn On Delay Time | 420 ps |
| Family | 10E |
| Logic Function | AND |
| Current - Quiescent (Iq) | 57mA |
| Halogen Free | Halogen Free |
| Number of Bits per Element | 1 |
| Trigger Type | Positive, Negative |
| High Level Output Current | -50mA |
| Low Level Output Current | 50mA |
| Power Supply Current-Max (ICC) | 60mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 4mm |
| Width | 4mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
MC10EP29MNG Overview
As a result, it is packaged as 20-VFQFN Exposed Pad. D flip flop is included in the Tubepackage. As configured, the output uses Differential. It is configured with a trigger that uses a value of Positive, Negative. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of -3V~-5.5V volts. It is operating at -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. The 10EPseries comprises this type of FPGA. It should not exceed 3GHzin its output frequency. As a result, it consumes 57mA quiescent current. It has been determined that there have been 20 terminations. Members of the 10EP29family make up this object. A voltage of 3.3V provides power to the D latch. An electronic device belonging to the family 10Ecan be found here. It is mounted in the way of Surface Mount. The 20pins are designed into the board. There is a clock edge trigger type of Positive Edgeon this device. This device is part of the FF/Latchesbase part number family. As soon as 5.5Vis reached, Vsup reaches its maximum value. Normally, the supply voltage (Vsup) should be above 3V. Due to its superior flexibility, it uses 2 circuits. In light of its reliable performance, this T flip flop is well suited for RAIL. To operate, the chip has a total of 1 output lines. In addition, you can refer to the additinal NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V of the D latch. A -50mAvalue is set for the high level output current. A 50mAvalue is set for low-level output current.
MC10EP29MNG Features
Tube package
10EP series
20 pins
MC10EP29MNG Applications
There are a lot of ON Semiconductor MC10EP29MNG Flip Flops applications.
- Digital electronics systems
- Set-reset capability
- Control circuits
- Data transfer
- Individual Asynchronous Resets
- Test & Measurement
- Matched Rise and Fall
- Memory
- Frequency division
- Pattern generators
