Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
LIFETIME (Last Updated: 1 month ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-SOIC (0.154, 3.90mm Width) |
Number of Pins |
8 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2005 |
Series |
10EP |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
Type |
D-Type |
Terminal Finish |
Tin (Sn) |
Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -3.0V TO -5.5V |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
ECL |
Voltage - Supply |
-3V~-5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
10EP31 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
-5.2V |
Supply Voltage-Min (Vsup) |
3V |
Number of Circuits |
1 |
Output Current |
50mA |
Number of Bits |
1 |
Clock Frequency |
3GHz |
Propagation Delay |
410 ps |
Turn On Delay Time |
340 ps |
Family |
10E |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
45mA |
Max Input Voltage |
2.48V |
Halogen Free |
Halogen Free |
Trigger Type |
Positive Edge |
High Level Output Current |
50mA |
Low Level Output Current |
50mA |
Power Supply Current-Max (ICC) |
47mA |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
3000000000Hz |
Length |
4.9mm |
Width |
3.9mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC10EP31DG Overview
The package is in the form of 8-SOIC (0.154, 3.90mm Width). It is included in the package Tube. The output it is configured with uses Differential. It is configured with a trigger that uses a value of Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of -3V~-5.5V. Temperature is set to -40°C~85°C TA. This D latch has the type D-Type. JK flip flop is a part of the 10EPseries of FPGAs. There should be no greater frequency than 3GHzon its output. As a result, it consumes 45mA quiescent current and is not affected by external forces. A total of 8 terminations have been made. The 10EP31 family contains it. A voltage of 3.3V is used as the power supply for this D latch. In terms of electronic devices, this device belongs to the 10Efamily of devices. This electronic part is mounted in the way of Surface Mount. 8pins are included in its design. This device has Positive Edgeas its clock edge trigger type. The RS flip flops belongs to FF/Latches base part number. This flip flop is designed with 1 Bits. It reaches the maximum supply voltage (Vsup) at 5.5V. The supply voltage (Vsup) should be kept above 3V for normal operation. To achieve this superior flexibility, 1 circuits are used. A reliable performance of this D flip flop makes it well suited for use in RAIL. The power supply is -5.2V. As a result of its output current of 50mA, it is very flexible in terms of design. Additionally, it is characterized by NECL MODE: VCC = 0V WITH VEE = -3.0V TO -5.5V. A 50mAvalue is set for the high level output current. 50mAis set as the low level output current.
MC10EP31DG Features
Tube package
10EP series
8 pins
1 Bits
-5.2V power supplies
MC10EP31DG Applications
There are a lot of ON Semiconductor MC10EP31DG Flip Flops applications.
- Computers
- Frequency Divider circuits
- Guaranteed simultaneous switching noise level
- Latch
- CMOS Process
- Instrumentation
- Memory
- Single Down Count-Control Line
- Modulo – n – counter
- Differential Individual