MC10EP31DR2G
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 10EP |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3.0V TO -5.5V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 10EP31 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | -5.2V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 3GHz |
| Propagation Delay | 410 ps |
| Turn On Delay Time | 340 ps |
| Family | 10E |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 45mA |
| Output Characteristics | OPEN-EMITTER |
| Halogen Free | Halogen Free |
| Trigger Type | Positive Edge |
| Power Supply Current-Max (ICC) | 47mA |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3000000000Hz |
| Length | 4.9mm |
| Width | 3.9mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
MC10EP31DR2G Overview
In the form of 8-SOIC (0.154, 3.90mm Width), it has been packaged. There is an embedded version in the package Tape & Reel (TR). This output is configured with Differential. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis occupied by this electronic component. With a supply voltage of -3V~-5.5V volts, it operates. It is at -40°C~85°C TAdegrees Celsius that the system is operating. The type of this D latch is D-Type. JK flip flop belongs to the 10EPseries of FPGAs. Its output frequency should not exceed 3GHz Hz. T flip flop consumes 45mA quiescent energy. A total of 8terminations have been recorded. Members of the 10EP31family make up this object. A voltage of 3.3V provides power to the D latch. It belongs to the family of electronic devices known as 10E. There is an electronic part that is mounted in the way of Surface Mount. With its 8pins, it is designed to work with most electronic flip flops. This device's clock edge trigger type is Positive Edge. This RS flip flops is a part number FF/Latches. It is designed with a number of bits of 1. Vsup reaches 5.5V, the maximal supply voltage. Keeping the supply voltage (Vsup) above 3V is necessary for normal operation. The superior flexibility is achieved through the use of 1 circuits. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. The D latch runs on a voltage of -5.2V volts. In addition, NECL MODE: VCC = 0V WITH VEE = -3.0V TO -5.5Vis a characteristic of it.
MC10EP31DR2G Features
Tape & Reel (TR) package
10EP series
8 pins
1 Bits
-5.2V power supplies
MC10EP31DR2G Applications
There are a lot of ON Semiconductor MC10EP31DR2G Flip Flops applications.
- Clock pulse
- Parallel data storage
- High Performance Logic for test systems
- Bus hold
- Buffered Clock
- Common Clocks
- Supports Live Insertion
- Differential Individual
- Single Up Count-Control Line
- Communications
