Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
Number of Pins |
8 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2008 |
Series |
10EP |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
8 |
Type |
D-Type |
Terminal Finish |
Tin (Sn) |
Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -3.0V TO -5.5V |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
ECL |
Voltage - Supply |
-3V~-5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
10EP31 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
-5.2V |
Supply Voltage-Min (Vsup) |
3V |
Number of Circuits |
1 |
Number of Bits |
1 |
Clock Frequency |
3GHz |
Propagation Delay |
410 ps |
Turn On Delay Time |
340 ps |
Family |
10E |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
45mA |
Halogen Free |
Halogen Free |
Trigger Type |
Positive Edge |
Power Supply Current-Max (ICC) |
47mA |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
3000000000Hz |
Length |
3mm |
Width |
3mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC10EP31DTG Overview
In the form of 8-TSSOP, 8-MSOP (0.118, 3.00mm Width), it has been packaged. A package named Tubeincludes it. As configured, the output uses Differential. The trigger it is configured with uses Positive Edge. The electronic part is mounted in the way of Surface Mount. A supply voltage of -3V~-5.5V is required for operation. Currently, the operating temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. In FPGA terms, D flip flop is a type of 10EPseries FPGA. A frequency of 3GHzshould be the maximum output frequency. It consumes 45mA of quiescent In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is a member of the 10EP31 family. It is powered by a voltage of 3.3V . An electronic device belonging to the family 10Ecan be found here. In this case, the electronic component is mounted in the way of Surface Mount. A total of 8pins are provided on this board. Its clock edge trigger type is Positive Edge. The part is included in FF/Latches. 1bits are used in its design. There is a 5.5Vmaximum supply voltage (Vsup). Normal operation requires a supply voltage (Vsup) above 3V. Using 1 circuits, it is highly flexible. As a result of its reliable performance, this T flip flop is suitable for RAIL. The system runs on a power supply of -5.2V watts. As an additional reference, you may refer to electronic flip flop NECL MODE: VCC = 0V WITH VEE = -3.0V TO -5.5V.
MC10EP31DTG Features
Tube package
10EP series
8 pins
1 Bits
-5.2V power supplies
MC10EP31DTG Applications
There are a lot of ON Semiconductor MC10EP31DTG Flip Flops applications.
- Shift Registers
- Buffered Clock
- Power down protection
- Divide a clock signal by 2 or 4
- 2 – Bit synchronous counter
- Circuit Design
- Set-reset capability
- Safety Clamp
- ATE
- Matched Rise and Fall