MC10EP35DR2G
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 10EP |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | JK Type |
| Terminal Finish | MATTE TIN |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| JESD-30 Code | R-PDSO-G8 |
| Function | Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Differential |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Bits | 2 |
| Clock Frequency | 3GHz |
| Family | 10E |
| Current - Quiescent (Iq) | 50mA |
| Output Polarity | COMPLEMENTARY |
| Trigger Type | Positive Edge |
| Propagation Delay (tpd) | 0.49 ns |
| Length | 4.9mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
MC10EP35DR2G Overview
8-SOIC (0.154, 3.90mm Width)is the packaging method. It is contained within the Tape & Reel (TR)package. Differentialis the output configured for it. This trigger uses the value Positive Edge. There is an electric part mounted in the way of Surface Mount. With a supply voltage of -3V~-5.5V volts, it operates. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a JK Type. It is a type of FPGA belonging to the 10EP series. In order for it to function properly, its output frequency should not exceed 3GHz. A total of 1elements are present in it. Despite external influences, it consumes 50mAof quiescent current. It has been determined that there have been 8 terminations. Power is supplied from a voltage of 3.3V volts. Devices in the 10Efamily are electronic devices. Flip flops designed with 2bits are used in this part. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. Keeping the supply voltage (Vsup) above 3V is necessary for normal operation. Additionally, you may refer to the additional NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V of the electronic flip flop.
MC10EP35DR2G Features
Tape & Reel (TR) package
10EP series
2 Bits
MC10EP35DR2G Applications
There are a lot of Rochester Electronics, LLC MC10EP35DR2G Flip Flops applications.
- Frequency division
- Count Modes
- Registers
- Supports Live Insertion
- Storage Registers
- Frequency Divider circuits
- Event Detectors
- Guaranteed simultaneous switching noise level
- Communications
- ESD performance
