MC10EP35DR2G
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 10EP |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | JK Type |
| Terminal Finish | Tin (Sn) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 10EP35 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | -5.2V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Bits | 2 |
| Clock Frequency | 3GHz |
| Propagation Delay | 490 ps |
| Turn On Delay Time | 410 ps |
| Family | 10E |
| Logic Function | Flip-Flop, JK-Type |
| Halogen Free | Halogen Free |
| Prop. Delay@Nom-Sup | 0.575 ns |
| Trigger Type | Positive Edge |
| High Level Output Current | -50mA |
| Low Level Output Current | 50mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3000000000Hz |
| Length | 4.9mm |
| Width | 3.9mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
MC10EP35DR2G Overview
As a result, it is packaged as 8-SOIC (0.154, 3.90mm Width). It is included in the package Tape & Reel (TR). This output is configured with Differential. The trigger configured with it uses Positive Edge. There is an electric part mounted in the way of Surface Mount. A voltage of -3V~-5.5Vis required for its operation. The operating temperature is -40°C~85°C TA. This electronic flip flop is of type JK Type. It belongs to the 10EPseries of FPGAs. You should not exceed 3GHzin the output frequency of the device. It has been determined that there have been 8 terminations. The 10EP35family includes it. Power is provided by a 3.3V supply. Electronic devices of this type belong to the 10Efamily. This electronic part is mounted in the way of Surface Mount. With its 8pins, it is designed to work with most electronic flip flops. The clock edge trigger type for this device is Positive Edge. The part you are looking for is included in FF/Latches. This flip flop is designed with 2 Bits. As soon as 5.5Vis reached, Vsup reaches its maximum value. Normal operation requires a supply voltage (Vsup) above 3V. As a result of its reliable performance, this T flip flop is suitable for TAPE AND REEL. A total of -5.2V power supplies are needed to run it. There are 1 output lines in this JK flip flop. NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5Vis also one of its characteristics. In this case, the high level output current is set to -50mA. There is no low level output current set at 50mA.
MC10EP35DR2G Features
Tape & Reel (TR) package
10EP series
8 pins
2 Bits
-5.2V power supplies
MC10EP35DR2G Applications
There are a lot of ON Semiconductor MC10EP35DR2G Flip Flops applications.
- Power down protection
- Bounce elimination switch
- EMI reduction circuitry
- Single Up Count-Control Line
- Test & Measurement
- Control circuits
- Safety Clamp
- Buffered Clock
- Matched Rise and Fall
- Digital electronics systems
