MC10EP35DT
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2008 |
| Series | 10EP |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Type | JK Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 10EP35 |
| JESD-30 Code | S-PDSO-G8 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | -5.2V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Bits | 2 |
| Clock Frequency | 3GHz |
| Propagation Delay | 490 ps |
| Turn On Delay Time | 410 ps |
| Family | 10E |
| Logic Function | Flip-Flop |
| Prop. Delay@Nom-Sup | 0.575 ns |
| Trigger Type | Positive Edge |
| High Level Output Current | -50mA |
| Low Level Output Current | 50mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3000000000Hz |
| Length | 3mm |
| Width | 3mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
MC10EP35DT Overview
The flip flop is packaged in 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). Package Tubeembeds it. It is configured with Differentialas an output. This trigger uses the value Positive Edge. This electronic part is mounted in the way of Surface Mount. The supply voltage is set to -3V~-5.5V. It is operating at -40°C~85°C TA. JK Typedescribes this flip flop. It belongs to the 10EPseries of FPGAs. A frequency of 3GHzshould not be exceeded by its output. There have been 8 terminations. It is a member of the 10EP35 family. The power supply voltage is 3.3V. An electronic device belonging to the family 10Ecan be found here. A part of the electronic system is mounted in the way of Surface Mount. The clock edge trigger type for this device is Positive Edge. It is included in FF/Latches. There are 2bits in its design. As soon as 5.5Vis reached, Vsup reaches its maximum value. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 3V. Compared to other similar T flip flops, this device offers reliable performance and is well suited for RAIL. An electrical current of -5.2V volts is applied to it. In order to operate, the chip has 1 output lines. NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5Vis also one of its characteristics. -50mA is set as the high level output current. Low level output current is set to 50mA.
MC10EP35DT Features
Tube package
10EP series
2 Bits
-5.2V power supplies
MC10EP35DT Applications
There are a lot of ON Semiconductor MC10EP35DT Flip Flops applications.
- High Performance Logic for test systems
- Memory
- Data Synchronizers
- Individual Asynchronous Resets
- Digital electronics systems
- Convert a momentary switch to a toggle switch
- Balanced 24 mA output drivers
- Computers
- Frequency Divider circuits
- Parallel data storage
