MC10EP35DTR2G
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 10EP |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Type | JK Type |
| Terminal Finish | Tin (Sn) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 10EP35 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | -5.2V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Bits | 2 |
| Clock Frequency | 3GHz |
| Propagation Delay | 490 ps |
| Turn On Delay Time | 410 ps |
| Family | 10E |
| Logic Function | Flip-Flop, JK-Type |
| Halogen Free | Halogen Free |
| Prop. Delay@Nom-Sup | 0.575 ns |
| Trigger Type | Positive Edge |
| High Level Output Current | -50mA |
| Low Level Output Current | 50mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3000000000Hz |
| Length | 3mm |
| Width | 3mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
MC10EP35DTR2G Overview
It is embeded in 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) case. It is included in the package Tape & Reel (TR). It is configured with Differentialas an output. This trigger uses the value Positive Edge. Surface Mountis positioned in the way of this electronic part. It operates with a supply voltage of -3V~-5.5V. A temperature of -40°C~85°C TAis used in the operation. JK Typeis the type of this D latch. JK flip flop is a part of the 10EPseries of FPGAs. It should not exceed 3GHzin terms of its output frequency. In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. You can search similar parts based on 10EP35. The power supply voltage is 3.3V. It is a member of the 10Efamily of D flip flop. It is mounted in the way of Surface Mount. This board has 8 pins. This device has the clock edge trigger type of Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. It is designed with 2bits. Vsup reaches its maximum value at 5.5V. Normally, the supply voltage (Vsup) should be above 3V. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. A total of -5.2V power supplies are needed to run it. There are no output lines on the JK flip flop. Additionally, there are NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V on the electronic flip flop that can be referred to. -50mAis the output current at high level. It is set to 50mAfor low level output current.
MC10EP35DTR2G Features
Tape & Reel (TR) package
10EP series
8 pins
2 Bits
-5.2V power supplies
MC10EP35DTR2G Applications
There are a lot of ON Semiconductor MC10EP35DTR2G Flip Flops applications.
- Clock pulse
- Communications
- High Performance Logic for test systems
- Buffer registers
- ESCC
- Data storage
- Shift registers
- ESD performance
- Safety Clamp
- Computing
