Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-SOIC (0.154, 3.90mm Width) |
Number of Pins |
8 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2008 |
Series |
10EP |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
Type |
D-Type |
Terminal Finish |
Tin (Sn) |
Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
ECL |
Voltage - Supply |
-3V~-5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
10EP52 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
-5.2V |
Supply Voltage-Min (Vsup) |
3V |
Number of Circuits |
1 |
Number of Bits |
1 |
Clock Frequency |
3GHz |
Propagation Delay |
380 ps |
Turn On Delay Time |
330 ps |
Family |
10E |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
45mA |
Halogen Free |
Halogen Free |
Trigger Type |
Positive, Negative |
High Level Output Current |
-50mA |
Low Level Output Current |
50mA |
Power Supply Current-Max (ICC) |
47mA |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
4000000000Hz |
Length |
4.9mm |
Width |
3.9mm |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC10EP52DR2G Overview
The flip flop is packaged in a case of 8-SOIC (0.154, 3.90mm Width). The package Tape & Reel (TR)contains it. There is a Differentialoutput configured with it. It is configured with the trigger Positive, Negative. In this case, the electronic component is mounted in the way of Surface Mount. A supply voltage of -3V~-5.5V is required for operation. In this case, the operating temperature is -40°C~85°C TA. This D latch has the type D-Type. The 10EPseries comprises this type of FPGA. You should not exceed 3GHzin its output frequency. There is 45mA quiescent consumption. There are 8 terminations,This D latch belongs to the family of 10EP52. A voltage of 3.3V provides power to the D latch. In terms of electronic devices, this device belongs to the 10Efamily of devices. A part of the electronic system is mounted in the way of Surface Mount. 8pins are included in its design. The clock edge trigger type for this device is Positive Edge. The part is included in FF/Latches. This flip flop is designed with 1 Bits. 5.5Vis the maximum supply voltage (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 3V. Its flexibility is enhanced by 1 circuits. In view of its reliability, this D flip flop is a good fit for TAPE AND REEL. The system runs on a power supply of -5.2V watts. Additionally, you may refer to the additional NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V of the electronic flip flop. It is set to -50mAfor the high level output current. 50mA is the low level output current.
MC10EP52DR2G Features
Tape & Reel (TR) package
10EP series
8 pins
1 Bits
-5.2V power supplies
MC10EP52DR2G Applications
There are a lot of ON Semiconductor MC10EP52DR2G Flip Flops applications.
- Individual Asynchronous Resets
- Parallel data storage
- Balanced Propagation Delays
- Frequency Divider circuits
- Cold spare funcion
- Frequency Dividers
- Latch
- Reduced system switching noise
- ATE
- Set-reset capability