Parameters |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Published |
2005 |
Series |
4000B |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
ECCN Code |
EAR99 |
Type |
JK Type |
Terminal Finish |
Tin (Sn) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
3V~18V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Current Rating |
2.25μA |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
4027 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
3V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
8.8mA |
Clock Frequency |
13MHz |
Propagation Delay |
350 ns |
Turn On Delay Time |
50 ns |
Logic Function |
AND, Flip-Flop, JK-Type |
Current - Quiescent (Iq) |
4μA |
Halogen Free |
Halogen Free |
Current - Output High, Low |
8.8mA 8.8mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
100ns @ 15V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
fmax-Min |
6.5 MHz |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.5mm |
Length |
10mm |
Width |
4mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 5 hours ago) |
Mount |
Surface Mount |
MC14027BDG Overview
16-SOIC (0.154, 3.90mm Width)is the packaging method. The package Tubecontains it. T flip flop uses Differentialas its output configuration. It is configured with a trigger that uses a value of Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at 3V~18Vvolts. It is operating at -55°C~125°C TA. It is an electronic flip flop with the type JK Type. FPGAs belonging to the 4000Bseries contain this type of chip. A frequency of 13MHzshould not be exceeded by its output. It consumes 4μA of quiescent current without being affected by external factors. There have been 16 terminations. This D latch belongs to the family of 4027. An input voltage of 5Vpowers the D latch. The input capacitance of this JK flip flopis 5pF farads. Surface Mount mounts this electronic component. Basically, it is designed with a set of 16 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. For normal operation, the supply voltage (Vsup) should be kept above 3V. The superior flexibility of this product is achieved by using 2 circuits. As a result of its reliability, this D flip flop is ideally suited for RAIL. With an output current of 8.8mA, this device offers maximum design flexibility.
MC14027BDG Features
Tube package
4000B series
16 pins
MC14027BDG Applications
There are a lot of ON Semiconductor MC14027BDG Flip Flops applications.
- Memory
- Supports Live Insertion
- Reduced system switching noise
- QML qualified product
- Data storage
- Divide a clock signal by 2 or 4
- Storage Registers
- Event Detectors
- Buffer registers
- Guaranteed simultaneous switching noise level