Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Published |
2009 |
Series |
4000B |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
3V~18V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
5V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
4076 |
Function |
Master Reset |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
3V |
Load Capacitance |
50pF |
Number of Bits |
4 |
Clock Frequency |
12MHz |
Propagation Delay |
600 ns |
Turn On Delay Time |
600 ns |
Current - Quiescent (Iq) |
20μA |
Current - Output High, Low |
8.8mA 8.8mA |
Max Propagation Delay @ V, Max CL |
180ns @ 15V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Number of Input Lines |
4 |
Number of Output Lines |
3 |
fmax-Min |
6 MHz |
Clock Edge Trigger Type |
Positive Edge |
Length |
9.9mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC14076BD Overview
It is embeded in 16-SOIC (0.154, 3.90mm Width) case. As part of the package Tube, it is embedded. Currently, the output is configured to use Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountis occupied by this electronic component. A voltage of 3V~18Vis required for its operation. Currently, the operating temperature is -55°C~125°C TA. Logic flip flops of this type are classified as D-Type. In terms of FPGAs, it belongs to the 4000B series. It should not exceed 12MHzin its output frequency. A total of 1elements are present in it. There is a consumption of 20μAof quiescent energy. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 4076 family contains this object. Power is supplied from a voltage of 5V volts. JK flip flop input capacitance is 5pF farads. In this case, the electronic component is mounted in the way of Surface Mount. This board has 16 pins. Its clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. An electronic part designed with 4bits is used in this application. Normally, the supply voltage (Vsup) should be above 3V. Compared to other similar T flip flops, this device offers reliable performance and is well suited for RAIL. It operates with 3 output lines. As of now, there are 4input lines.
MC14076BD Features
Tube package
4000B series
16 pins
4 Bits
MC14076BD Applications
There are a lot of ON Semiconductor MC14076BD Flip Flops applications.
- Divide a clock signal by 2 or 4
- Power down protection
- Single Down Count-Control Line
- Counters
- Buffer registers
- Data Synchronizers
- Pattern generators
- Digital electronics systems
- Load Control
- ESD performance