Parameters |
Packaging |
Tube |
Published |
2009 |
Series |
4000B |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
3V~18V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
5V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
4175 |
Function |
Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
3V |
Number of Circuits |
4 |
Load Capacitance |
50pF |
Number of Bits |
4 |
Clock Frequency |
14MHz |
Propagation Delay |
400 ns |
Turn On Delay Time |
70 ns |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
20μA |
Current - Output High, Low |
8.8mA 8.8mA |
Max Propagation Delay @ V, Max CL |
120ns @ 15V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
fmax-Min |
6.5 MHz |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
2000000Hz |
Length |
9.9mm |
Width |
3.9mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Operating Temperature |
-55°C~125°C TA |
MC14175BD Overview
As a result, it is packaged as 16-SOIC (0.154, 3.90mm Width). It is contained within the Tubepackage. T flip flop uses Differentialas the output. The trigger it is configured with uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. A voltage of 3V~18Vis required for its operation. -55°C~125°C TAis the operating temperature. A flip flop of this type is classified as a D-Type. JK flip flop is a part of the 4000Bseries of FPGAs. Its output frequency should not exceed 14MHz Hz. D latch consists of 1 elements. As a result, it consumes 20μA quiescent current. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 4175family includes it. A voltage of 5V provides power to the D latch. This JK flip flop has a 5pFfarad input capacitance. There is an electronic component mounted in the way of Surface Mount. The 16pins are designed into the board. It has a clock edge trigger type of Positive Edge. This device is part of the FF/Latchesbase part number family. There are 4bits in this flip flop. Normally, the supply voltage (Vsup) should be kept above 3V. Its superior flexibility is attributed to its use of 4 circuits.
MC14175BD Features
Tube package
4000B series
16 pins
4 Bits
MC14175BD Applications
There are a lot of ON Semiconductor MC14175BD Flip Flops applications.
- Shift Registers
- Convert a momentary switch to a toggle switch
- Buffer registers
- Differential Individual
- Matched Rise and Fall
- ESCC
- Supports Live Insertion
- Functionally equivalent to the MC10/100EL29
- Latch-up performance
- Asynchronous counter