MC68030FE33C
| Parameters | |
|---|---|
| Package / Case | 132-BCQFP |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Published | 2007 |
| Series | M680x0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Base Part Number | MC68030 |
| Speed | 33MHz |
| Core Processor | 68030 |
| Voltage - I/O | 5.0V |
| Number of Cores/Bus Width | 1 Core 32-Bit |
| Graphics Acceleration | No |
| Additional Interfaces | SCI, SPI |
| RoHS Status | ROHS3 Compliant |
MC68030FE33C Description
The MC68030FE33C is an integrated controller that incorporates the capabilities of the MC68030 integer unit, a data cache, an instruction cache, an access control unit (ACU), and an improved bus controller on one VLSI device. It maintains the 32-bit registers available with the entire M68000 Family and the 32-bit address and data paths, rich instruction set, versatile addressing modes, and flexible coprocessor interface provided with the MC68020 and MC68030. In addition, the internal operations of this integrated controller are designed to operate in parallel, allowing instruction execution to proceed in parallel with access to the internal caches and the bus controller
MC68030FE33C Features
Object-Code Compatible with the MC68020, MC68030, and Earlier M68000 Microprocessors
Burst-Mode Bus Interface for Efficient DRAM Access
On-Chip Data Cache (256 Bytes) and On-Chip Instruction Cache (256 Byte)
Dynamic Bus Sizing for Direct Interface to 8-, 16-, and 32-Bit Devices
25- and 40-MHz Operating Frequency (up to 9.2 MIPS)
Advanced Plastic Pin Grid Array Packaging for Through-Hole Applications
MC68030FE33C Applications
Communications equipment
Datacom module
Industrial
Motor drives
Enterprise systems
Enterprise projectors
