Parameters | |
---|---|
Package / Case | 206-BPGA |
Supplier Device Package | 206-PGA (47.25x47.25) |
Operating Temperature | 0°C~70°C TA |
Packaging | Tray |
Published | 1995 |
Series | M680x0 |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
Base Part Number | MC68060 |
Speed | 50MHz |
Core Processor | 68060 |
Voltage - I/O | 5.0V |
Number of Cores/Bus Width | 1 Core 32-Bit |
Graphics Acceleration | No |
Additional Interfaces | SCI, SPI |
RoHS Status | Non-RoHS Compliant |
The superscalar MC68060RC50 represents a new line of NXP? Semiconductors microprocessor products. The M68060 product line consists of the MC68060, MC68LC060, and MC68EC060. The MC68060 is fully equipped with a floating-point unit (FPU) and a memory management unit (MMU) for high-performance embedded control applications. For cost-sensitive embedded control and desktop applications where an MMU is required, but the additional cost of an FPU is not justified, the MC68LC060 offers high performance at a low cost. Designed explicitly for low-cost embedded control applications, the MC68EC060 eliminates both the FPU and MMU, permitting designers to leverage MC68060 performance while avoiding the cost of unnecessary features.
1.6–1.7 Times the MC68040 Performance at the Same Clock Rate with Existing Compliers. 3.2–3.4 Times the Performance of a 25 MHZ MC68040.
Harvard Architecture with Independent, Decoupled Fetch, and Execution Pipelines.
Branch Prediction Logic with a 256-Entry, 4-Way Set-Associative, Virtual-Mapped
Branch Cache for Improved Branch Instruction Performance.
A Superscalar Pipeline and Dual Integer Execution Units Achieving Simultaneous, but not Out-of-Order Instruction Execution.
An IEEE Standard, MC68040- and MC68881-/MC68882-Compatible FPU.
Dual 8-Kbyte Caches (Instruction Cache and Data Cache)
A Flexible, High-Bandwidth Synchronous Bus Interface
User Object-Code Compatible with All Earlier M68000 Microprocessors
Automotive
Infotainment & cluster
Industrial
Building automation
Personal electronics
Gaming