MC68360CAI25L
| Parameters | |
|---|---|
| Package / Case | 240-BFQFP |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tray |
| Published | 1995 |
| Series | M683xx |
| JESD-609 Code | e3 |
| Part Status | Not For New Designs |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 240 |
| ECCN Code | 3A991.A.2 |
| Terminal Finish | Matte Tin (Sn) |
| HTS Code | 8542.31.00.01 |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | MC68360 |
| JESD-30 Code | S-PQFP-G240 |
| Speed | 25MHz |
| uPs/uCs/Peripheral ICs Type | SERIAL IO/COMMUNICATION CONTROLLER, SERIAL |
| Core Processor | CPU32+ |
| Clock Frequency | 25MHz |
| Address Bus Width | 32 |
| Boundary Scan | YES |
| Low Power Mode | YES |
| External Data Bus Width | 32 |
| Voltage - I/O | 5.0V |
| Ethernet | 10Mbps (1) |
| Number of Cores/Bus Width | 1 Core 32-Bit |
| Graphics Acceleration | No |
| RAM Controllers | DRAM |
| Additional Interfaces | SCC, SMC, SPI |
| Co-Processors/DSP | Communications; CPM |
| Bus Compatibility | 68000 |
| Data Transfer Rate-Max | 1.25 MBps |
| Communication Protocol | ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC |
| RoHS Status | ROHS3 Compliant |
MC68360CAI25L Description
The MC68360CAI25L QUad Integrated Communication Controller (QUICC?) is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. The MC68360CAI25L particularly excels in communications activities. The QUICC can be described as a next-generation MC68302, with higher performance in all areas of device operation, increased flexibility, and higher integration. The term "quad" comes from the fact that there are four serial communications controllers (SCCs) on the device. However, there are actually seven serial channels which include four SCCs, two serial management controllers (SMCs), and one serial peripheral interface (SPI).
MC68360CAI25L Features
Up to 32-bit Data Bus (Dynamic Bus Sizing for 8- and 16-Bits) + 32 Address Lines
Complete static design (0-33 MHz Operation)
Follower mode to disable CPU32+ (allows use with external processors)
Four general-purpose timers -Four 16-bit timers or two 32-bit timers
Two Independent DMAs (IDMAs)
Four baud rate generators
Time-Slot assignor
Supports two TDM channels
Parallel Interface Port (supports the fast connection between QUICCs)
MC68360CAI25L Applications
Communications equipment
Broadband fixed line access
Industrial
Motor drives
Enterprise systems
Enterprise machine
