Parameters | |
---|---|
Factory Lead Time | 1 Week |
Package / Case | 240-BFQFP |
Surface Mount | YES |
Operating Temperature | 0°C~70°C TA |
Packaging | Tray |
Published | 1995 |
Series | M683xx |
JESD-609 Code | e3 |
Part Status | Not For New Designs |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Number of Terminations | 240 |
ECCN Code | 3A991.A.2 |
Terminal Finish | Tin (Sn) |
HTS Code | 8542.31.00.01 |
Technology | CMOS |
Terminal Position | QUAD |
Terminal Form | GULL WING |
Peak Reflow Temperature (Cel) | 260 |
Time@Peak Reflow Temperature-Max (s) | 40 |
Base Part Number | MC68EN360 |
JESD-30 Code | S-PQFP-G240 |
Speed | 25MHz |
uPs/uCs/Peripheral ICs Type | RISC MICROCONTROLLER |
Core Processor | CPU32+ |
Voltage - I/O | 5.0V |
Ethernet | 10Mbps (1) |
Number of Cores/Bus Width | 1 Core 32-Bit |
Graphics Acceleration | No |
RAM Controllers | DRAM |
Additional Interfaces | SCC, SMC, SPI |
Co-Processors/DSP | Communications; CPM |
RoHS Status | ROHS3 Compliant |
The MC68EN360AI25L Quad Integrated Communication Controller (QUICC?) is a versatile one-chip integrated microprocessor and peripheral combination family that can be used in a variety of controller applications.
The MC68EN360AI25L particularly excels in communications activities. The QUICC can be described as a next-generation MC68302, with higher performance in all areas of device operation, increased flexibility, and higher integration. The term "quad" comes from the fact that there are four serial communications controllers (SCCs) on the device.
Up to 32-bit Data Bus (Dynamic Bus Sizing for 8- and 16-Bits) + 32 Address Lines
Complete static design (0-33 MHz Operation)
Follower mode to disable CPU32+ (allows use with external processors)
The memory controller (eight banks)
Four general-purpose timers
Two Independent DMAs (IDMAs)
RISC Communications Processor Module (CPM)
Automotive
Body electronics & lighting
Industrial
Test & Measurement
Personal electronics
Gaming