Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2006 |
Series |
74AC |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74AC574 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
95MHz |
Propagation Delay |
13.5 ns |
Turn On Delay Time |
2 ns |
Family |
AC |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
8μA |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
9.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
60000000Hz |
Height Seated (Max) |
2.05mm |
Width |
5.275mm |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC74AC574MG Overview
The flip flop is packaged in 20-SOIC (0.209, 5.30mm Width). It is contained within the Tubepackage. There is a Tri-State, Non-Invertedoutput configured with it. The trigger it is configured with uses Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 2V~6Vis used as the supply voltage. Temperature is set to -40°C~85°C TA. D-Typeis the type of this D latch. This type of FPGA is a part of the 74AC series. This D flip flop should not have a frequency greater than 95MHz. A total of 1 elements are present. T flip flop consumes 8μA quiescent energy. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. If you search by 74AC574, you will find similar parts. A voltage of 5V provides power to the D latch. Its input capacitance is 4.5pFfarads. This D flip flop belongs to the family of AC. There is an electronic part that is mounted in the way of Surface Mount. With its 20pins, it is designed to work with most electronic flip flops. There is a clock edge trigger type of Positive Edgeon this device. It is part of the FF/Latchesbase part number family. An electronic part designed with 8bits is used in this application. It reaches 6Vwhen the supply voltage is maximal (Vsup). It is imperative that the supply voltage (Vsup) is maintained above 2Vin order to ensure normal operation. Its superior flexibility is attributed to its use of 8 circuits. A total of 2ports are embedded in the D flip flop. For high efficiency, the supply voltage should be set to 5V. There are no output lines on the JK flip flop.
MC74AC574MG Features
Tube package
74AC series
20 pins
8 Bits
MC74AC574MG Applications
There are a lot of ON Semiconductor MC74AC574MG Flip Flops applications.
- Power down protection
- Circuit Design
- Bounce elimination switch
- Safety Clamp
- Matched Rise and Fall
- Patented noise
- ATE
- Differential Individual
- Storage registers
- Data Synchronizers