Parameters |
Mount |
Through Hole |
Mounting Type |
Through Hole |
Package / Case |
20-DIP (0.300, 7.62mm) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2006 |
Series |
74AC |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74AC574 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
95MHz |
Propagation Delay |
13.5 ns |
Turn On Delay Time |
2 ns |
Family |
AC |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
8μA |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
9.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Number of Input Lines |
8 |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
60000000Hz |
Height Seated (Max) |
4.57mm |
Width |
7.62mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC74AC574N Overview
The item is packaged in 20-DIP (0.300, 7.62mm)cases. A package named Tubeincludes it. As configured, the output uses Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. In this case, the electronic component is mounted in the way of Through Hole. A voltage of 2V~6Vis required for its operation. -40°C~85°C TAis the operating temperature. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of 74ACseries FPGA. A frequency of 95MHzshould not be exceeded by its output. A total of 1 elements are present. It consumes 8μA of quiescent current without being affected by external factors. It has been determined that there have been 20 terminations. The 74AC574family includes it. A voltage of 5V is used as the power supply for this D latch. Its input capacitance is 4.5pFfarads. ACis the family of this D flip flop. In this case, the electronic component is mounted in the way of Through Hole. Basically, it is designed with a set of 20 pins. There is a clock edge trigger type of Positive Edgeon this device. This device is part of the FF/Latchesbase part number family. The flip flop is designed with 8bits. It reaches 6Vwhen the maximum supply voltage (Vsup) is applied. The supply voltage (Vsup) should be kept above 2V for normal operation. A D flip flop with 2embedded ports is available. For high efficiency, the supply voltage should be set to 5V. In order for the chip to function, it has 3output lines. As of now, there are 8input lines.
MC74AC574N Features
Tube package
74AC series
20 pins
8 Bits
MC74AC574N Applications
There are a lot of ON Semiconductor MC74AC574N Flip Flops applications.
- Frequency division
- Asynchronous counter
- ATE
- Frequency Dividers
- Safety Clamp
- Registers
- EMI reduction circuitry
- Clock pulse
- Computing
- Synchronous counter