Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2006 |
Series |
74ACT |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
5V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ACT374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
160MHz |
Propagation Delay |
10 ns |
Turn On Delay Time |
8.5 ns |
Family |
ACT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
8μA |
Current - Output High, Low |
24mA 24mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
10ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
90000000Hz |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC74ACT374DW Overview
It is packaged in the way of 20-SOIC (0.295, 7.50mm Width). Package Tubeembeds it. In the configuration, Tri-State, Non-Invertedis used as the output. It is configured with a trigger that uses a value of Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A supply voltage of 4.5V~5.5V is required for operation. Currently, the operating temperature is -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop is a part of the 74ACTseries of FPGAs. Its output frequency should not exceed 160MHz. The element count is 1 . During its operation, it consumes 8μA quiescent energy. It has been determined that there have been 20 terminations. The 74ACT374 family contains this object. An input voltage of 5Vpowers the D latch. This JK flip flop has a 4.5pFfarad input capacitance. It is a member of the ACTfamily of D flip flop. The electronic part is mounted in the way of Surface Mount. The 20pins are designed into the board. This device exhibits a clock edge trigger type of Positive Edge. The part you are looking for is included in FF/Latches. Flip flops designed with 8bits are used in this part. Its flexibility is enhanced by 8 circuits. It operates from 5V power supplies. The flip flop has 2ports embedded within it. The supply voltage should be maintained at 5V for high efficiency. It is designed with 3 output lines.
MC74ACT374DW Features
Tube package
74ACT series
20 pins
8 Bits
5V power supplies
MC74ACT374DW Applications
There are a lot of ON Semiconductor MC74ACT374DW Flip Flops applications.
- CMOS Process
- Data transfer
- QML qualified product
- Clock pulse
- ESD performance
- Safety Clamp
- Latch-up performance
- Patented noise
- Digital electronics systems
- Computing