Parameters |
Mount |
Through Hole |
Mounting Type |
Through Hole |
Package / Case |
20-DIP (0.300, 7.62mm) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2006 |
Series |
74ACT |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Tin (Sn) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Base Part Number |
74ACT374 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
160MHz |
Propagation Delay |
12.5 ns |
Turn On Delay Time |
8.5 ns |
Family |
ACT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
8μA |
Current - Output High, Low |
24mA 24mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
10ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
90000000Hz |
Height Seated (Max) |
4.57mm |
Width |
7.62mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC74ACT374NG Overview
The item is packaged in 20-DIP (0.300, 7.62mm)cases. D flip flop is embedded in the Tube package. This output is configured with Tri-State, Non-Inverted. It is configured with a trigger that uses Positive Edge. In this case, the electronic component is mounted in the way of Through Hole. The JK flip flop operates at 4.5V~5.5Vvolts. -40°C~85°C TAis the operating temperature. This D latch has the type D-Type. This type of FPGA is a part of the 74ACT series. It should not exceed 160MHzin terms of its output frequency. D latch consists of 1 elements. This process consumes 8μA quiescents. Terminations are 20. The object belongs to the 74ACT374 family. Power is provided by a 5V supply. The input capacitance of this T flip flop is 4.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. ACTis the family of this D flip flop. Electronic part Through Holeis mounted in the way. As you can see from the design, it has pins with 20. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. 8bits are used in its design. Despite its superior flexibility, it relies on 8 circuits to achieve it. An electrical current of 5V volts is applied to it. There are 2 ports embedded in the flip flops. If high efficiency is desired, the supply voltage should be kept at 5V. There are no output lines on the JK flip flop.
MC74ACT374NG Features
Tube package
74ACT series
20 pins
8 Bits
5V power supplies
MC74ACT374NG Applications
There are a lot of ON Semiconductor MC74ACT374NG Flip Flops applications.
- Functionally equivalent to the MC10/100EL29
- Computing
- Frequency Divider circuits
- Instrumentation
- Communications
- Event Detectors
- Single Down Count-Control Line
- Balanced 24 mA output drivers
- Divide a clock signal by 2 or 4
- Set-reset capability