Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2009 |
Series |
74ACT |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
5V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74ACT377 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Bits |
8 |
Clock Frequency |
140MHz |
Propagation Delay |
10 ns |
Turn On Delay Time |
3 ns |
Family |
ACT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
8μA |
Current - Output High, Low |
24mA 24mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
10ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC74ACT377DW Overview
As a result, it is packaged as 20-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Tube. T flip flop is configured with an output of Non-Inverted. This trigger uses the value Positive Edge. Surface Mountis in the way of this electric part. Powered by a 4.5V~5.5Vvolt supply, it operates as follows. Currently, the operating temperature is -40°C~85°C TA. D-Typeis the type of this D latch. It is a type of FPGA belonging to the 74ACT series. Its output frequency should not exceed 140MHz Hz. There are 1 elements in it. This process consumes 8μA quiescents. There are 20 terminations,JK flip flop belongs to 74ACT377 family. The D flip flop is powered by a voltage of 5V . The input capacitance of this JK flip flopis 4.5pF farads. It is a member of the ACTfamily of D flip flop. In this case, the electronic component is mounted in the way of Surface Mount. This board has 20 pins. The clock edge trigger type for this device is Positive Edge. It is part of the FF/Latchesbase part number family. An electronic part with 8bits has been designed. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). Normally, the supply voltage (Vsup) should be kept above 4.5V. Despite its superior flexibility, it relies on 8 circuits to achieve it. The D latch operates on 5V volts.
MC74ACT377DW Features
Tube package
74ACT series
20 pins
8 Bits
5V power supplies
MC74ACT377DW Applications
There are a lot of ON Semiconductor MC74ACT377DW Flip Flops applications.
- Latch-up performance
- Communications
- Buffered Clock
- Balanced 24 mA output drivers
- Latch
- ESCC
- Counters
- Safety Clamp
- QML qualified product
- Load Control