MC74ACT377NG
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 20-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACT |
| JESD-609 Code | e3 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| JESD-30 Code | R-PDIP-T20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Clock Frequency | 140MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 8μA |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 10ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 4.57mm |
| Width | 7.62mm |
| RoHS Status | ROHS3 Compliant |
MC74ACT377NG Overview
It is packaged in the way of 20-DIP (0.300, 7.62mm). It is included in the package Tube. This output is configured with Non-Inverted. Positive Edgeis the trigger it is configured with. The electronic part is mounted in the way of Through Hole. The JK flip flop operates at a voltage of 4.5V~5.5V. A temperature of -40°C~85°C TAis considered to be the operating temperature. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74ACTseries FPGA. It should not exceed 140MHzin terms of its output frequency. In total, there are 1 elements. There is a consumption of 8μAof quiescent energy. It has been determined that there have been 20 terminations. It is powered by a voltage of 5V . A 4.5pFfarad input capacitance is provided by this T flip flop. In this case, the D flip flop belongs to the ACTfamily. Vsup reaches its maximum value at 5.5V. Normally, the supply voltage (Vsup) should be above 4.5V.
MC74ACT377NG Features
Tube package
74ACT series
MC74ACT377NG Applications
There are a lot of Rochester Electronics, LLC MC74ACT377NG Flip Flops applications.
- Pattern generators
- Bus hold
- ATE
- Data transfer
- Instrumentation
- QML qualified product
- CMOS Process
- Common Clocks
- Single Down Count-Control Line
- Buffer registers
