MC74ACT564N
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 20-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACT |
| JESD-609 Code | e0 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | TIN LEAD |
| Additional Feature | BROADSIDE VERSION OF 534 |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| JESD-30 Code | R-PDIP-T20 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Tri-State, Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Number of Ports | 2 |
| Clock Frequency | 85MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 8μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 10.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Height Seated (Max) | 4.57mm |
| Width | 7.62mm |
| RoHS Status | Non-RoHS Compliant |
MC74ACT564N Overview
20-DIP (0.300, 7.62mm)is the way it is packaged. It is contained within the Tubepackage. As configured, the output uses Tri-State, Inverted. It is configured with the trigger Positive Edge. It is mounted in the way of Through Hole. With a supply voltage of 4.5V~5.5V volts, it operates. Temperature is set to -40°C~85°C TA. It is an electronic flip flop with the type D-Type. This type of FPGA is a part of the 74ACT series. It should not exceed 85MHzin its output frequency. A total of 1elements are contained within it. This process consumes 8μA quiescents. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. A voltage of 5V is used to power it. The input capacitance of this JK flip flopis 4.5pF farads. In terms of electronic devices, this device belongs to the ACTfamily of devices. Vsup reaches its maximum value at 5.5V. The supply voltage (Vsup) should be maintained above 4.5V for normal operation. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. There is also a characteristic of BROADSIDE VERSION OF 534.
MC74ACT564N Features
Tube package
74ACT series
MC74ACT564N Applications
There are a lot of Rochester Electronics, LLC MC74ACT564N Flip Flops applications.
- Reduced system switching noise
- Modulo – n – counter
- Event Detectors
- Balanced 24 mA output drivers
- ESD protection
- Divide a clock signal by 2 or 4
- Buffered Clock
- Cold spare funcion
- Registers
- Storage Registers
