Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Number of Pins |
20 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Published |
2012 |
Series |
74HC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3V |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74HC273 |
Function |
Reset |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Power Supplies |
2/6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Bits |
8 |
Clock Frequency |
35MHz |
Propagation Delay |
145 ns |
Turn On Delay Time |
25 ns |
Family |
HC/UH |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
7.8mA 7.8mA |
Max I(ol) |
0.006 A |
Max Propagation Delay @ V, Max CL |
25ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
fmax-Min |
24 MHz |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2.05mm |
Width |
5.275mm |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC74HC273AFG Overview
The item is packaged in 20-SOIC (0.209, 5.30mm Width)cases. Package Tubeembeds it. Currently, the output is configured to use Non-Inverted. It is configured with the trigger Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~6V volts. It is operating at a temperature of -55°C~125°C TA. D-Typedescribes this flip flop. It is a type of FPGA belonging to the 74HC series. Its output frequency should not exceed 35MHz. D latch consists of 1 elements. There is 4μA quiescent consumption. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 74HC273family includes it. A voltage of 3V provides power to the D latch. Input capacitance of this device is 10pF farads. This D flip flop belongs to the family of HC/UH. A part of the electronic system is mounted in the way of Surface Mount. With its 20pins, it is designed to work with most electronic flip flops. In this device, the clock edge trigger type is Positive Edge. This part is included in FF/Latches. It is designed with 8bits. As soon as 6Vis reached, Vsup reaches its maximum value. It is imperative that the supply voltage (Vsup) is maintained above 2Vin order to ensure normal operation. In order to achieve its superior flexibility, 8 circuits are used. Considering its reliability, this T flip flop is well suited for RAIL. A total of 2/6V power supplies are needed to run it.
MC74HC273AFG Features
Tube package
74HC series
20 pins
8 Bits
2/6V power supplies
MC74HC273AFG Applications
There are a lot of ON Semiconductor MC74HC273AFG Flip Flops applications.
- Memory
- EMI reduction circuitry
- Asynchronous counter
- Count Modes
- Data transfer
- Single Up Count-Control Line
- Data storage
- Memory
- Common Clocks
- Buffered Clock