Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Number of Pins |
20 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Published |
2012 |
Series |
74HC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3V |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74HC574 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Power Supplies |
2/6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
35MHz |
Propagation Delay |
160 ns |
Turn On Delay Time |
27 ns |
Family |
HC/UH |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
7.8mA 7.8mA |
Max I(ol) |
0.006 A |
Max Propagation Delay @ V, Max CL |
27ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2.05mm |
Width |
5.275mm |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC74HC574AFG Overview
The item is packaged in 20-SOIC (0.209, 5.30mm Width)cases. The Tubepackage contains it. T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger uses the value Positive Edge. Surface Mountmounts this electrical part. The supply voltage is set to 2V~6V. It is operating at a temperature of -55°C~125°C TA. A flip flop of this type is classified as a D-Type. In FPGA terms, D flip flop is a type of 74HCseries FPGA. Its output frequency should not exceed 35MHz Hz. The list contains 1 elements. This process consumes 4μA quiescents. A total of 20terminations have been recorded. JK flip flop belongs to 74HC574 family. The D flip flop is powered by a voltage of 3V . This T flip flop has a capacitance of 10pF farads at the input. Devices in the HC/UHfamily are electronic devices. There is an electronic part mounted in the way of Surface Mount. 20pins are included in its design. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This device has the base part number FF/Latches. There are 8bits in this flip flop. As soon as 6Vis reached, Vsup reaches its maximum value. For normal operation, the supply voltage (Vsup) should be kept above 2V. To achieve this superior flexibility, 8 circuits are used. A reliable performance of this D flip flop makes it well suited for use in RAIL. The D latch operates on 2/6V volts. The D flip flop is embedded with 2ports. There are no output lines on the JK flip flop.
MC74HC574AFG Features
Tube package
74HC series
20 pins
8 Bits
2/6V power supplies
MC74HC574AFG Applications
There are a lot of ON Semiconductor MC74HC574AFG Flip Flops applications.
- Consumer
- Storage Registers
- Memory
- Clock pulse
- 2 – Bit synchronous counter
- Pattern generators
- Frequency division
- Computers
- Instrumentation
- Divide a clock signal by 2 or 4