Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.209, 5.30mm Width) |
Number of Pins |
14 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Published |
2011 |
Series |
74HC |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
3V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74HC74 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Load Capacitance |
50pF |
Number of Bits |
1 |
Clock Frequency |
35MHz |
Propagation Delay |
100 ns |
Turn On Delay Time |
17 ns |
Family |
HC/UH |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
2μA |
Current - Output High, Low |
5.2mA 5.2mA |
Max I(ol) |
0.004 A |
Max Propagation Delay @ V, Max CL |
17ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
Number of Input Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC74HC74AF Overview
14-SOIC (0.209, 5.30mm Width)is the way it is packaged. Package Tubeembeds it. T flip flop uses Differentialas its output configuration. It is configured with a trigger that uses Positive Edge. Surface Mountis in the way of this electric part. Powered by a 2V~6Vvolt supply, it operates as follows. Temperature is set to -55°C~125°C TA. The type of this D latch is D-Type. The FPGA belongs to the 74HC series. This D flip flop should not have a frequency greater than 35MHz. In total, there are 2 elements. It consumes 2μA of quiescent current without being affected by external factors. 14terminations have occurred. D latch belongs to the 74HC74 family. An input voltage of 3Vpowers the D latch. This JK flip flop has a 10pFfarad input capacitance. In this case, the D flip flop belongs to the HC/UHfamily. Surface Mount mounts this electronic component. As you can see from the design, it has pins with 14. Its clock edge trigger type is Positive Edge. It is part of the FF/Latchesbase part number family. It is designed with a number of bits of 1. Vsup reaches its maximum value at 6V. The supply voltage (Vsup) should be kept above 2V for normal operation. On the basis of its reliable performance, this D flip flop is well suited for use with RAIL. Currently, there are 1 input lines present.
MC74HC74AF Features
Tube package
74HC series
14 pins
1 Bits
MC74HC74AF Applications
There are a lot of ON Semiconductor MC74HC74AF Flip Flops applications.
- Consumer
- 2 – Bit synchronous counter
- Individual Asynchronous Resets
- Frequency Divider circuits
- Asynchronous counter
- Computing
- Single Up Count-Control Line
- Modulo – n – counter
- Data storage
- Convert a momentary switch to a toggle switch