Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.154, 3.90mm Width) |
Number of Pins |
14 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2009 |
Series |
74LCX |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
2.5V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LCX74 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Clock Frequency |
150MHz |
Propagation Delay |
8 ns |
Turn On Delay Time |
1.5 ns |
Family |
LVC/LCX/Z |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
7ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
7 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
7pF |
Number of Output Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
Length |
8.65mm |
Width |
3.9mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC74LCX74D Overview
The flip flop is packaged in a case of 14-SOIC (0.154, 3.90mm Width). D flip flop is embedded in the Tube package. This output is configured with Differential. The trigger it is configured with uses Positive Edge. Surface Mountmounts this electrical part. A 2V~3.6Vsupply voltage is required for it to operate. In the operating environment, the temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. The FPGA belongs to the 74LCX series. It should not exceed 150MHzin terms of its output frequency. It consumes 10μA of quiescent It has been determined that there have been 14 terminations. Members of the 74LCX74family make up this object. The power source is powered by 2.5V. A JK flip flop with a 7pFfarad input capacitance is used here. LVC/LCX/Zis the family of this D flip flop. It is mounted by the way of Surface Mount. It is designed with 14 pins. This device exhibits a clock edge trigger type of Positive Edge. The part you are looking for is included in FF/Latches. The maximal supply voltage (Vsup) reaches 3.6V. A normal operating voltage (Vsup) should remain above 2V. Its flexibility is enhanced by 2 circuits. Considering its reliability, this T flip flop is well suited for RAIL. The D latch operates on 3.3V volts. There are 1 output lines on it.
MC74LCX74D Features
Tube package
74LCX series
14 pins
3.3V power supplies
MC74LCX74D Applications
There are a lot of ON Semiconductor MC74LCX74D Flip Flops applications.
- Instrumentation
- Storage Registers
- Latch-up performance
- Consumer
- Differential Individual
- Clock pulse
- Balanced 24 mA output drivers
- Data Synchronizers
- Matched Rise and Fall
- Convert a momentary switch to a toggle switch