Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
14 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2011 |
Series |
74LCX |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74LCX74 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Load Capacitance |
50pF |
Number of Bits |
1 |
Clock Frequency |
150MHz |
Propagation Delay |
8 ns |
Turn On Delay Time |
1.5 ns |
Family |
LVC/LCX/Z |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
7ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
7 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
7pF |
Number of Input Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
Length |
5mm |
Width |
4.4mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC74LCX74DT Overview
In the form of 14-TSSOP (0.173, 4.40mm Width), it has been packaged. The package Tubecontains it. T flip flop is configured with an output of Differential. This trigger uses the value Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~3.6V. It is operating at -40°C~85°C TA. It is an electronic flip flop with the type D-Type. In FPGA terms, D flip flop is a type of 74LCXseries FPGA. In order for it to function properly, its output frequency should not exceed 150MHz. The list contains 2 elements. As a result, it consumes 10μA quiescent current and is not affected by external forces. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. If you search by 74LCX74, you will find similar parts. The power source is powered by 2.5V. Its input capacitance is 7pFfarads. It is a member of the LVC/LCX/Zfamily of D flip flop. A part of the electronic system is mounted in the way of Surface Mount. This board has 14 pins. The clock edge trigger type for this device is Positive Edge. The RS flip flops belongs to FF/Latches base part number. Flip flops designed with 1bits are used in this part. Vsup reaches its maximum value at 3.6V. The supply voltage (Vsup) should be kept above 2V for normal operation. As a result of its reliable performance, this T flip flop is suitable for RAIL. The D latch operates on 3.3V volts. There are 1 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
MC74LCX74DT Features
Tube package
74LCX series
14 pins
1 Bits
3.3V power supplies
MC74LCX74DT Applications
There are a lot of ON Semiconductor MC74LCX74DT Flip Flops applications.
- ATE
- Counters
- Computers
- Data Synchronizers
- Computing
- Load Control
- Parallel data storage
- Data storage
- Divide a clock signal by 2 or 4
- Bus hold